HMP112P7EFR8C-C4_1 Datasheet, PDF (1/32 Pages) Hynix Semiconductor – 240pin Registered DDR2 SDRAM DIMMs

240pin Registered DDR2 SDRAM DIMMs based on 1Gb version E
This Hynix Registered Dual In-Line Memory Module (DIMM) series consists of 1Gb version E DDR2
SDRAMs in Fine Ball Grid Array (FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 1Gb
version E based Registered DDR2 DIMM series provide a high performance 8 byte interface in 5.25" width
form factor of industry standard. It is suitable for easy interchange and addition.
FEATURES
• JEDEC standard Double Data Rate2 Synchro-
nous DRAMs (DDR2 SDRAMs) with 1.8V +/-
0.1V Power Supply
• All inputs and outputs are compatible with
SSTL_1.8 interface
• 8 Bank architecture
• Posted CAS
• Programmable CAS Latency 3, 4, 5, 6
• OCD (Off-Chip Driver Impedance Adjustment)
• ODT (On-Die Termination)
• Fully differential clock operations (CK & CK)
• Programmable Burst Length 4 / 8 with both
sequential and interleave mode
• Auto refresh and self refresh supported
• 8192 refresh cycles / 64ms
• Serial presence detect with EEPROM
• DDR2 SDRAM Package: 60 ball(x4/x8)
• 133.35 x 30.00 mm form factor
• Halogen free & RoHS compliant
ORDERING INFORMATION
Part Name
Density Organization
# of
DRAMs
# of
ranks
Materials
Parity
Support
HMP112P7EFR8C-C4/Y5/S6/S5 1GB
128Mx72
9
HMP125P7EFR8C-C4/Y5/S6/S5 2GB
256Mx72
18
HMP125P7EFR4C-C4/Y5/S6/S5 2GB
256Mx72
18
HMP151P7EFR8C-C4/Y5/S6/S5 4GB
512Mx72
36
HMP151P7EFR4C-C4/Y5/S6/S5 4GB
512Mx72
36
HMP31GP7EMR4C-C4/Y5
8GB
512Mx72
72
1 Halogen Free
O
2 Halogen Free
O
1 Halogen Free
O
4 Halogen Free
O
2 Halogen Free
O
4 Halogen Free
O
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.3 / Oct. 2008
1