AK5720VT Datasheet, PDF (17/25 Pages) HuaXinAn Electronics CO.,LTD – ADC

[AK5720]
Mode
0
1
2
3
4
5
6
7
DIF/TDMI pin
L
H
L
H
L
H
L
H
SDTO
LRCK
BICK
24bit, MSB justified H/L  48fs or 32fs
24bit, I²S Compatible L/H  48fs or 32fs
24bit, MSB justified H/L
64fs
24bit, I²S Compatible L/H
64fs
24bit, MSB justified H/L
64fs
24bit, I²S Compatible L/H
64fs
24bit, MSB justified H/L
64fs
24bit, I²S Compatible L/H
64fs
Table 3. Audio Interface Format
Figure
Figure 8
Figure 9
Figure 8
Figure 9
Figure 8
Figure 9
Figure 8
Figure 9
LRCK
BICK(64fs)
01 2
12 13 14
24 25
31 0 1 2
12 13 14
24 25
31 0 1
SDTO
23 22
12 11 10
0
23 22
12 11 10
0
23
23:MSB, 0:LSB
Lch Data
Rch Data
Figure 8. Mode 0, 2, 4, 6 Timing (Normal mode, MSB justified)
LRCK
BICK(64fs)
0 1 2 3 23 24 25 26
29 30 31 0 1 2 3 23 24 25 26
29 30 31 0 1
SDTO
23 22
210
23 22
210
23:MSB, 0:LSB
Lch Data
Rch Data
Figure 9. Mode 1, 3, 5, 7 Timing (Normal mode, I²S Compatible)
LRCK (Mode 8)
256 BICK
LRCK (Mode 9)
BICK (256fs)
SDTO
23 22 0 23 22 0
23 22
L
32 BICK
R
32 BICK
Figure 10. Mode 8, 9Timing (TDM256 mode, MSB justified)
LRCK (Mode 10)
256 BICK
LRCK (Mode 11)
5)
BICK (256fs)
SDTO
23 0
23 0
23
L
R
32 BICK 32 BICK
Figure 11. Mode 10, 11 Timing (TDM256 mode, I²S Compatible)
MS1641-J-00
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2014/04