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AK5720VT Datasheet, PDF (11/25 Pages) HuaXinAn Electronics CO.,LTD – ADC | |||
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[AK5720]
Parameter
Symbol
min
typ
max
Unit
Audio Interface Timing (Slave mode)
Normal mode
BICK Period
tBCK
160
ns
BICK Pulse Width Low
tBCKL
65
ns
Pulse Width High
tBCKH
65
ns
LRCK Edge to BICK âïâ (Note 8)
tLRB
30
ns
BICK âïâ to LRCK Edge (Note 8)
tBLR
30
LRCK to SDTO (MSB) (Except I2S mode) tLRS
ns
35
ns
BICK âï¯â to SDTO
tBSD
35
ns
TDM256 mode
BICK Period
tBCK
40
ns
BICK Pulse Width Low
tBCKL
16
ns
Pulse Width High
tBCKH
16
ns
LRCK Edge to BICK âïâ
(Note 8) tLRB
10
ns
BICK âïâ to LRCK Edge
(Note 8) tBLR
10
ns
SDTO Setup time BICK âïâ
tBSS
7
ns
SDTO Hold BICK âïâ
tBSH
6
ns
TDMI Hold Time
tSDH
4
ns
TDMI Setup Time
tSDS
5
ns
Audio Interface Timing (Master mode)
Normal mode
BICK Frequency
fBCK
64fs
Hz
BICK Duty
dBCK
50
%
BICK âï¯â to LRCK
tMBLR
ï20
20
ns
BICK âï¯â to SDTO
tBSD
ï40
40
ns
TDM256 mode
BICK Frequency
fBCK
256fs
Hz
BICK Duty
(Note 9) dBCK
50
%
BICK âï¯â to LRCK
tMBLR
ï10
10
ns
SDTO Setup time BICK âïâ
tBSS
7
ns
SDTO Hold BICK âïâ
tBSH
6
ns
TDMI Hold Time
tSDH
4
ns
TDMI Setup Time
tSDS
5
ns
Power-Down & Reset Timing
PDN Pulse Width
(Note 10) tPD
150
ns
PDN Reject Pulse Width
(Note 10) tRPD
30
ns
PDN âïâ to SDTO valid
(Note 11) tPDV
4129
1/fs
Note 8. ãã®è¦æ ¼å¤ã¯LRCKã®ã¨ãã¸ã¨BICKã®âïâãéãªããªãããã«è¦å®ãã¦ãã¾ãã
Note 9. MCLKã®ãã¥ã¼ãã£ã50%ã®ã¨ãã
Note 10. é»æºæå
¥æã¯PDN pin ãâLâ ã«ãããã¨ã§ãªã»ããããããã¾ãã150ns以ä¸ã®PDN pin = âLâã
ã«ã¹ã§ãªã»ããããããã¾ãã30ns以ä¸ã®PDN pin= âLâãã«ã¹ã§ã¯ãªã»ããã¯ãããã¾ããã
Note 11. PDN pin ãç«ã¡ä¸ãã¦ããã®LRCKã¯ããã¯ã® âïâ ã®åæ°ã§ãã
MS1641-J-00
- 10 -
2014/04
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