HDMP-0450 Datasheet, PDF (9/10 Pages) Agilent(Hewlett-Packard) – Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops

Pin Diagram and Recommended Supply Filtering
GND
V_CC
FM_NODE [1]–
FM_NODE [1]+
V_CCHS[1]
TO_NODE [1]–
TO_NODE [1]+
GND
FM_NODE [0]–
FM_NODE [0]+
GND
44 43 42 41 40 39 38 37 36 35 34
1
33
2
32
3
31
4
30
Agilent
5
29
6
HDMP-0450
28
7
nnnn-nnn Rz.zz
27
8
S YYWW
26
9
25
10
24
11
23
12 13 14 15 16 17 18 19 20 21 22
GND
V_CC
TO_NODE[4]+
TO_NODE[4]–
V_CCHS[4]
FM_NODE[4]+
FM_NODE[4]–
V_CCHS[0]
TO_NODE[0]–
TO_NODE[0]+
GND
Figure 8. HDMP-0450 package layout and marking, top view.
nnnn-nnn = WAFER LOT – BUILD NUMBER
Rz.zz = DIE REVISION
S = SUPPLIER CODE
YYWW = DATE CODE (YY = YEAR, WW = WORK WEEK)
COUNTRY = COUNTRY OF MANUFACTURE (ON BACK SIDE)
V_CC
GND
V_CC
GND
GND
44 43 42 41 40 39 38 37 36 35 34
1
33
2
32
3
31
4
30
5
29
6
HDMP-0450
28
7
27
8
26
9
25
10
24
11
23
12 13 14 15 16 17 18 19 20 21 22
GND
V_CC
10 µF
V_CC
V_CC
GND
CAPACITORS = 0.1 µF (EXCEPT WHERE NOTED).
Figure 9. Recommended power supply filtering.
9