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HCMS-39X2 Datasheet, PDF (9/22 Pages) Agilent(Hewlett-Packard) – 3.3 V High Performance CMOS 5x7 AlphaNumeric Displays
AC Timing Characteristics over Temperature Range (-40 to +85°C)
Timing
Diagram
Ref. Number Description
4.5 V<VLOGIC < 5.5 V VLOGIC = 3 V
Symbol Min. Max.
Min. Max. Units
1
Register Select Setup Time to Chip Enable
trss
10
10
ns
2
Register Select Hold Time to Chip Enable
trsh
10
10
ns
3
Rising Clock Edge to Falling Chip Enable Edge tclkce 20
20
ns
4
Chip Enable Setup Time to Rising Clock Edge tces
35
55
ns
5
Chip Enable Hold Time to Rising Clock Edge
tceh
20
20
ns
6
Data Setup Time to Rising Clock Edge
tds
10
10
ns
7
Data Hold Time after Rising Clock Edge
tdh
10
10
ns
8
Rising Clock Edge to DOUT [1]
tdout
10 40
10 65 ns
9
Propagation Delay DIN to DOUT
Simultaneous Mode for one IC[1,2]
tdoutp
18
30 ns
10
CE Falling Edge to DOUT Valid
tcedo
25
45 ns
11
Clock High Time
tclkh
80
100
ns
12
Clock Low Time
tclkl
80
100
ns
Reset Low Time
trstl
50
50
ns
Clock Frequency
Fcyc
5
4
MHz
Internal Display Oscillator Frequency
Finosc 80 210
80 210 KHz
Internal Refresh Frequency
Frf
150 410
150 410 Hz
External Display Oscillator Frequency
Prescaler = 1
Prescaler = 8
Fexosc
51.2 1000
410 8000
51.2 1000 KHz
410 8000 KHz
Notes:
1. Timing specifications increase 0.3 ns per pf of capacitive loading above 15 pF.
2. This parameter is valid for Simultaneous Mode data entry of the Control Register.
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