RGR1551 Datasheet, PDF (3/6 Pages) Agilent(Hewlett-Packard) – Fiber Optic “Light to Logic” Receiver with Clock Recovery

Functional Description
Design
The receiver contains an InGaAsP
photodetector, transimpedance
amplifier, and interface amplifier
circuit, including a clock recovery
and data retiming function. It is
designed with a multimode fiber
pigtail to allow maximum
flexibility in connector options.
The interface amplifier is ac
coupled to the preamplifier
circuit.
identically, even if only one
output is used. This will lower the
power supply noise generated by
the receiver and improve
performance at low optical input
power levels.
Power Supplies
The RGR1551 will operate to
specifications with a single +5 V
power supply (Pin 10 grounded).
The –5 V PIN bias is provided to
maintain functional compatibility
with second sources.
Signal traces should conform to
ECL design rules to prevent
reflections and ringing from
degrading performance. Useful
guidelines are contained in ECL
manufacturer design manuals.
Manufacturing
The fiber pigtail on the device
requires normal fiber handling
considerations. Care should be
taken to avoid tight bends as well
as excessive tension on the fiber
pigtail.
Terminating the Outputs
The data outputs of the RGR1551
are PECL compatible. Care
should be taken to match termin-
ation impedances to the intercon-
nect to minimize reflection
effects. In order to balance the
drive currents drawn from the
module, all serial data outputs
(DATA and DATA, CLOCK and
CLOCK) should be terminated
Circuit Layout
The RGR1551 uses very high
bandwidth circuitry to achieve its
high level of performance. Care
must be taken to ensure stable
operation. The use of ground
planes and transmission line
interconnects is required. The use
of a standard evaluation board is
highly recommended for those
users who are not familiar with
these techniques.
The allowable temperature range
for the RGR1551 is limited by the
material used in the pigtail.
Exposure to temperatures over
+85°C is not recommended. Low
profile sockets or hand soldering
are recommended for this part.
V_CC (+5 V)
TRANSIMPEDANCE
AMPLIFIER
V_NEG
(-5 V OR GROUND)
Figure 1. Block Diagram.
MID AMPLIFIER
LOW PASS FILTER
PLL
CLOCK AND
DATA RECOVERY
ALARM
ALARM
CLOCK
CLOCK
DATA
DATA
GND (0 V)
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