HCPL-2201 Datasheet, PDF (15/15 Pages) Agilent(Hewlett-Packard) – Very High CMR, Wide VCC Logic Gate Optocouplers

V_CC1 (+5 V)
DATA INPUT
80 Ω
1.1 kΩ
HCPL-2201/11
HCPL-02XX
HCNW22XX
1
120 pF
2
3
TTL OR LSTTL
4
8
7
6*
5
1
* 0.1 µF BYPASS
V_CC2 (+5 V)
DATA OUTPUT
UP TO 16 LSTTL LOADS
OR 4 TTL LOADS
2
Figure 13b. Recommended LSTTL to LSTTL Circuit for Applications Requiring
a Maximum Allowable Propagation Delay of 300 ns.
V_CC1
(+5 V)
DATA
INPUT
80 Ω*
HCPL-2201/11
HCPL-02XX
HCNW22XX
1.1
120 ₁
kΩ
pF*
2
V_{CC 8}
7
3
TTL OR LSTTL
4
6
GND ₅
V_CC2
(4.5 TO 20 V)
R_L
CMOS
**
DATA
OUTPUT
TOTEM
POLE
OUTPUT
1
GATE
V_CC2
5V
10 V
15 V
20 V
R_L
1.1 kΩ
2.37 kΩ
3.83 kΩ
5.11 kΩ
2
* 120 pF PEAKING CAPACITOR
MAY BE OMITTED AND 80 Ω
RESISTOR MAY BE SHORTED
WHERE 500 ns PROPAGATION
DELAY IS SUFFICIENT.
**0.1 µF BYPASS
Figure 14. LSTTL to CMOS Interface Circuit.
V_CC1 (+5 V)
DATA
INPUT
TTL or
LSTTL
1.1 kΩ
D1
HCPL-2201/11
HCPL-02XX
HCNW22XX
1
V_{CC 8}
2
7
3
6
4
GND ₅
D1 (1N4150) REQUIRED FOR
ACTIVE PULL-UP DRIVER.
Figure 15. Alternative LED Drive
Circuit.
V_CC (+5 V)
DATA INPUT
80 Ω*
1.1 kΩ
1
120 pF*
2
4.7 kΩ
3
TTL OR LSTTL
4
HCPL-2201/11
HCPL-02XX
HCNW22XX
V_{CC 8}
7
6
GND ₅
OPEN
COLLECTOR
GATE
* 120 pF PEAKING CAPACITOR
MAY BE OMITTED AND 80 Ω
RESISTOR MAY BE SHORTED
WHERE 500 ns PROPAGATION
DELAY IS SUFFICIENT.
Figure 16. Series LED Drive with Open Collector Gate
(4.7 k Resistor Shunts I_OH from the LED).
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