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HCPL-7720 Datasheet, PDF (14/18 Pages) Agilent(Hewlett-Packard) – 40 ns Propagation Delay CMOS Optocoupler
Implementing DeviceNet and SDS
with the HCPL-772X/072X
With transmission rates up to 1
Mbit/s, both DeviceNet and SDS
are based upon the same
broadcast-oriented, communica-
tions protocol — the Controller
Area Network (CAN). Three types
of isolated nodes are
recommended for use on these
networks: Isolated Node Powered
by the Network (Figure 18),
DRAIN/SHIELD
SIGNAL
POWER
NODE/APP SPECIFIC
uP/CAN
HCPL
772x/072x
HCPL
772x/072x
TRANSCEIVER
REG.
ISOLATED
SWITCHING
POWER
SUPPLY
GALVANIC
ISOLATION
BOUNDARY
V+ (SIGNAL)
V– (SIGNAL)
V+ (POWER)
V– (POWER)
Isolated Node with Transceiver
Powered by the Network (Figure
19), and Isolated Node Providing
Power to the Network (Figure 20).
Isolated Node Powered by the
Network
This type of node is very flexible
and as can be seen in Figure 18, is
regarded as “isolated” because not
all of its components have the
same ground reference. Yet, all
components are still powered by
the network. This node contains
two regulators: one is isolated and
powers the CAN controller, node-
specific application and isolated
(node) side of the two optocoup-
lers while the other is non-
isolated. The non-isolated
regulator supplies the transceiver
and the non-isolated (network)
half of the two optocouplers.
NETWORK
POWER
SUPPLY
Figure 18. Isolated node powered by the network.
Isolated Node with Transceiver
Powered by the Network
Figure 19 shows a node powered
by both the network and another
source. In this case, the trans-
ceiver and isolated (network) side
of the two optocouplers are
powered by the network. The rest
of the node is powered by the AC
line which is very beneficial when
an application requires a
significant amount of power. This
method is also desirable as it does
not heavily load the network.
More importantly, the unique
“dual-inverting” design of the
HCPL-772X/072X ensure the
network will not “lock-up” if
either AC line power to the node
is lost or the node powered-off.
Specifically, when input power
(VDD1) to the HCPL-772X/072X
located in the transmit path is
eliminated, a RECESSIVE bus
state is ensured as the
HCPL-772X/072X output voltage
(VO) go HIGH.
*Bus V+ Sensing
It is suggested that the Bus V+
sense block shown in Figure 19 be
implemented. A locally powered
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