RFM42B Datasheet, PDF (35/51 Pages) List of Unclassifed Manufacturers – ISM TRANSMITTER

RFM42B/43B
7. Auxiliary Functions
7.1. Smart Reset
The RFM42B/43B contains an enhanced integrated SMART RESET or POR circuit. The POR circuit contains both
a classic level threshold reset as well as a slope detector POR. This reset circuit was designed to produce a
reliable reset signal under any circumstances. Reset will be initiated if any of the following conditions occur:
 Initial power on, VDD starts from gnd: reset is active till V_DD reaches V_RR (see table);
 When V_DD decreases below V_LD for any reason: reset is active till V_DD reaches V_RR;
 A software reset via “Register 08h. Operating Mode and Function Control 2,”: reset is active for time T_SWRST
 V_DD glitch when the supply voltage exceeds the following time functioned limit:
VDD nom.
VDD(t)
reset limit:
0.4V+t*0.2V/ms
0.4V
actual VDD(t)
showing glitch
t=0,
VDD starts to rise
Reset
T_P
t
reset:
Vglitch>=0.4+t*0.2V/ms
Figure 16. POR Glitch Parameters
Table 13. POR Parameters
Parameter
Release Reset Voltage
Power-On VDD Slope
Low VDD Limit
Software Reset Pulse
Threshold Voltage
Reference Slope
VDD Glitch Reset Pulse
Symbol
VRR
SVDD
VLD
TSWRST
VTSD
k
TP
Comment
tested VDD slope region
VLD<VRR is guaranteed
Also occurs after SDN, and
initial power on
Min
0.85
0.03
0.7
50
—
—
5
Typ Max Unit
1.3 1.75 V
— 300 V/ms
1
1.3
V
— 470 µs
0.4 —
V
0.2 — V/ms
15 40 ms
The reset will initialize all registers to their default values. The reset signal is also available for output and use by
the microcontroller by using the default setting for GPIO_0. The inverted reset signal is available by default on
GPIO_1.
Tel: [phone] Fax: [phone] E-mail: [e-mail] http://www.hoperf.com
35