HMX2000 Datasheet, PDF (2/2 Pages) Honeywell Solid State Electronics Center – MIXED SIGNAL SOI GATE ARRAYS

HMX2000
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Building blocks
ƒ 8-bit, 8-channel A/D converter
ƒ 12-bit current-output DAC
ƒ Laser-trimmed precision voltage reference
ƒ General purpose opamp, bias generators
ƒ PLL, 2 versions, 50 –180 MHz
ƒ Misc. Amplifiers
ƒ Comparators
ƒ Analog Output Buffer
ƒ SPICE models, Custom Cell Design Services
SPECIFICATIONS
HMX2000 Characteristics
Maximum gate count and I/O
Typical delay – 2 input NAND
I/O interface levels
Typical power consumption, PW/MHz/gate
Operating temperature range
Minimum Geometry
Analog supply level
NMOS/PMOS V_t matching
Poly resistor characteristics
P-well resistor characteristics
Linear capacitor characteristics
275,000 useable gates and 388 signal I/O
270 ps @ 5.0V
TTL, CMOS, Schmitt trigger
0.6 @ 5.0V
-55qC to +125qC
0.8 Pm Drawn/ 0.65 PmL_eff
5.0V
NMOS - V ~ 1.0 mV (large devices)
PMOS - V ~ 1.5 mV (large devices)
250 ppm/qC, 250 PA/Pm RMS current density,
100:/square r 30%
2500 ppm/qC, 20 PA/Pm RMS current density,
-2000 ppm/V, 2500:/square, r 35%
-100 ppm/V, 0.5 fF/Pm², 20 ppm/qC
The HMX2000 family has a cold sparing feature to
allow a chip level power down mode, in which the
associated busses connected to the chip can remain
active. This high impedance off-state buffer feature
allows users to power down portions of their system
for power savings.
Honeywell’s VDS^TM design kit and SOI libraries
provide the necessary guidance to achieve first pass
design success. The VDS design kit supports
industry leading Electronic Design Automation tools
including those offered by Mentor Graphics,
Synopsys, and Cadence. Honeywell can perform
design translations to the HMX2000 ASIC family
from other Computer Aided Design platforms.
Customers may use familiar CAD tools and libraries
to map existing designs to Honeywell library
components.
Any analog tools capable of SPICE simulation can
be used to design the analog part of the mixed mode
design. Honeywell will provide SOI-IV Mixed
Signal Design Guidelines to assist users in the
design of analog functions. The basic technology
parameters such as capacitance, sheet resistance,
maximum operating voltage and electromigration
limits along with BSIM device models are
documented in the SOI-IV Electrical Rules and are
available to designers.
Honeywell assigns a Customer Design Engineer to
each ASIC program to provide technical
assistance, telephone support, and to coordinate
the design through mask release. A project
manager is also assigned to communicate fab, test
and package assembly status. The HMX2000
mixed mode ASIC family provides customers with
an integration capability that can improve system
performance while reducing power and provides
system cost savings. To learn more about
Honeywell’s variety of custom and semi-custom
IC products, call us at 763-954-2888.
Honeywell reserves the right to make changes to any products or technology herein to improve reliability, function or design.
Honeywell does not assume any liability arising out of the application or use of any product or circuit described herein: neither does it
convey any license under its patent rights nor the rights of others. 11/01
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