HT66FV130 Datasheet, PDF (74/259 Pages) Holtek Semiconductor Inc – Enhanced Voice Flash MCU

HT66FV130/HT66FV140
HT66FV150/HT66FV160
Enhanced Voice Flash MCU
Bit 2
Bit 1
Bit 0
Unimplemented, read as 0.
FHIDEN: High Frequency oscillator control when CPU is switched off
0: Disable
1: Enable
This bit is used to control whether the high speed oscillator is activated or stopped
when the CPU is switched off by executing an "HALT" instruction.
FSIDEN: Low Frequency oscillator control when CPU is switched off
0: Disable
1: Enable
This bit is used to control whether the low speed oscillator is activated or stopped
when the CPU is switched off by executing an "HALT" instruction. The LIRC
oscillator is controlled by this bit together with the WDT function enable control when
the LIRC is selected to be the low speed oscillator clock source or the WDT function
is enabled respectively. If this bit is cleared to 0 but the WDT function is enabled, the
LIRC oscillator will also be enabled.
SCC Register – HT66FV140/HT66FV150/HT66FV160
Bit
7
6
5
4
Name CKS2 CKS1 CKS0
—
R/W
R/W
R/W
R/W
—
POR
0
0
0
—
3
FHS
R/W
0
2
1
0
FSS FHIDEN FSIDEN
R/W
R/W
R/W
0
0
0
Bit 7~5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CKS2~CKS0: System clock selection
000: fH
001: fH/2
010: fH/4
011: fH/8
100: fH/16
101: fH/32
110: fH/64
111: fSUB
These three bits are used to select which clock is used as the system clock source. In
addition to the system clock source directly derived from fH or fSUB, a divided version
of the high speed system oscillator can also be chosen as the system clock source.
Unimplemented, read as 0.
FHS: High Frequency clock selection
0: HIRC
1: HXT
FSS: Low Frequency clock selection
0: LIRC
1: LXT
FHIDEN: High Frequency oscillator control when CPU is switched off
0: Disable
1: Enable
This bit is used to control whether the high speed oscillator is activated or stopped
when the CPU is switched off by executing an "HALT" instruction.
FSIDEN: Low Frequency oscillator control when CPU is switched off
0: Disable
1: Enable
This bit is used to control whether the low speed oscillator is activated or stopped
when the CPU is switched off by executing an "HALT" instruction. The LIRC
oscillator is controlled by this bit together with the WDT function enable control when
the LIRC is selected to be the low speed oscillator clock source or the WDT function
is enabled respectively. If this bit is cleared to 0 but the WDT function is enabled, the
LIRC oscillator will also be enabled.
Rev. 1.50
74
December 06, 2016