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HT56R66_12 Datasheet, PDF (73/104 Pages) Holtek Semiconductor Inc – TinyPowerTM A/D Type with LCD 8-Bit OTP MCU
HT56R66/HT56R666
the System oscillator/4, the choice of which is determine
by the fS clock source configuration option.
Note that the RTC interrupt period is controlled by both
configuration options and an internal register RTCC. A
configuration option selects the source clock for the in-
ternal clock fS, and the RTCC register bits RT2, RT1 and
RT0 select the division ratio. Note that the actual divi-
sion ratio can be programmed from 28 to 215.
Time Base Interrupt
The Time Base Interrupt is contained within the
Multi-function Interrupt.
For a Time Base Interrupt to be generated, the global in-
terrupt enable bit, EMI,Time Base Interrupt enable bit,
ETBI, and Multi-function interrupt enable bit, EMFI,
must first be set. An actual Time Base Interrupt will take
place when the Time Base Interrupt request flag, TBF, is
set, a situation that will occur when the Time Base over-
flows. When the interrupt is enabled, the stack is not full
and the Time Base overflows, a subroutine call to the
Multi-function interrupt vector at location18H, will take
place. When the Time Base Interrupt is serviced, the
EMI bit will be cleared to disable other interrupts, how-
ever only the MFF interrupt request flag will be reset. As
the TBF flag will not be automatically reset, it has to be
cleared by the application program.
The purpose of the Time Base function is to provide an
interrupt signal at fixed time periods. The Time Base in-
terrupt clock source originates from the Time Base inter-
rupt clock source originates from the internal clock
source fS. This fS input clock first passes through a di-
vider, the division ratio of which is selected by configura-
tion options to provide longer Time Base interrupt
periods. The Time Base interrupt time-out period ranges
from 212/fS~215/fS. The clock source that generates fS,
which in turn controls the Time Base interrupt period,
can originate from three different sources, the 32768Hz
oscillator, the 32K_INT internal oscillator or the System
oscillator/4, the choice of which is determine by the fS
clock source configuration option.
Essentially operating as a programmable timer, when
the Time Base overflows it will set a Time Base interrupt
flag which will in turn generate an Interrupt request via
the Multi-function Interrupt vector.
Programming Considerations
By disabling the interrupt enable bits, a requested inter-
rupt can be prevented from being serviced, however,
once an interrupt request flag is set, it will remain in this
condition in the INTC0, INTC1 and MFIC registers until
the corresponding interrupt is serviced or until the re-
quest flag is cleared by the application program.
It is recommended that programs do not use the ²CALL
subroutine² instruction within the interrupt subroutine.
Interrupts often occur in an unpredictable manner or
need to be serviced immediately in some applications. If
only one stack is left and the interrupt is not well con-
trolled, the original control sequence will be damaged
once a ²CALL subroutine² is executed in the interrupt
subroutine.
All of these interrupts have the capability of waking up
the processor when in the Power Down Mode.
Only the Program Counter is pushed onto the stack. If
the contents of the status or other registers are altered
by the interrupt service program, which may corrupt the
desired control sequence, then the contents should be
saved in advance.
Reset and Initialisation
A reset function is a fundamental part of any
microcontroller ensuring that the device can be set to
some predetermined condition irrespective of outside
parameters. The most important reset condition is after
power is first applied to the microcontroller. In this case,
internal circuitry will ensure that the microcontroller, af-
ter a short delay, will be in a well defined state and ready
to execute the first program instruction. After this
power-on reset, certain important internal registers will
be set to defined states before the program com-
mences. One of these registers is the Program Counter,
which will be reset to zero forcing the microcontroller to
begin program execution from the lowest Program
Memory address.
In addition to the power-on reset, situations may arise
where it is necessary to forcefully apply a reset condition
when the microcontroller is running. One example of this
is where after power has been applied and the
microcontroller is already running, the RES line is force-
fully pulled low. In such a case, known as a normal oper-
ation reset, some of the microcontroller registers remain
unchanged allowing the microcontroller to proceed with
normal operation after the reset line is allowed to return
high. Another type of reset is when the Watchdog Timer
overflows and resets the microcontroller. All types of re-
set operations result in different register conditions be-
ing setup.
fS Y S /4
32768H z
3 2 K _ IN T
fS S o u rc e
C o n fig u r a tio n
O p tio n
fS
C o n fig u r a tio n O p tio n
D iv id e b y 2 1 2 ~ 2 1 5
Time Base Interrupt
T im e B a s e In te r r u p t
2 12/fS ~ 2 15/fS
Rev. 1.40
73
May 11, 2012