HT82A525R_16 Datasheet, PDF (7/71 Pages) Holtek Semiconductor Inc – I/O Type USB 8-Bit OTP MCU with SPI

HT82A525R
I/O Type USB 8-Bit OTP MCU with SPI
Pin Name
PD0/COM0/D0
PD1/COM1/D1
PD2/COM2/D2
PD3/COM3/D3
PD4/D4~PD7/D7
PE0/SCS1
PE1/SCK1
PE2/SDI1
PE3/SDO1
PE4~PE7
PF0/OSCI
PF1/OSCO
RES
VSS
AVSS
VDDIO
HVDD
VDD
V33O
USBDP
USBDM
I/O
Options
Description
Bidirectional I/O lines. Each nibble on this port can be configured
as a wake-up input by a configuration option. Software
Pull-high instructions determine if the pin is a CMOS output or Schmitt
I/O
(nibble option) Trigger input. Configuration options determine which nibble on
wake-up the port have pull-high resistors.
(nibble option) PD0~PD3 are pin-shared with COM0~COM3. The parallel DMA
data D0~D7 lines are pin shared with PD0~PD7.
The power supply for the I/O pins is sourced from the VDDIO pin.
Bidirectional I/O lines. Each nibble on this port can be configured
as a wake-up input by a configuration option. Software
Pull-high instructions determine if the pin is a CMOS output or Schmitt
I/O
(nibble option) Trigger input. Configuration options determine which nibble on
wake-up the port have pull-high resistors.
(nibble option) SCS1 is pin shared with PE0. SCK1 is pin shared with PE1.
SDI1 is pin shared with PE2. SDO is pin shared with PE3.
The power supply for the I/O pins is sourced from the VDDIO pin.
I/O (PF0)
Pull-high
wake-up
Bidirectional I/O line. The pin can be configured as a wake-up
input by a configuration option. Software instructions determine
if the pin is a CMOS output or Schmitt trigger input. A
configuration option determines if the pin has a pull-high resistor.
The power supply for the I/O pins is sourced from the VDD pin.
I(OSCI)
¾
External crystal connection
I/O (PF1)
Pull-high
wake-up
Bidirectional I/O line. The pin can be configured as a wake-up
input by a configuration option. Software instructions determine
if the pin is a CMOS output or Schmitt trigger input. A
configuration option determines if the pin has a pull-high resistor.
The power supply for the I/O pins is sourced from the VDD pin.
O(OSCO)
¾
External crystal connection
I
¾
Schmitt trigger reset input, active low
¾
¾
HIRC and digital negative power supply, ground
¾
¾
Analog negative power supply, ground
Positive power supply, VDDIO is used for PA, PB, PC, PD, PE,
¾
¾
except PF. For 24-pin SSOP package, the VDDIO pin is double
bonding to VDD pin.
¾
¾
HIRC Positive power supply
¾
¾
Analog and digital positive power supply
O
¾
3.3V regulator output, can be disabled by firmware
USB D+ or 3D PS2 data line.
I/O
¾
USB function is controlled using software control registers.
PS2 function is controlled by the SELPS2 bit in USC register.
USB D- or 3D PS2 CLK line.
I/O
¾
USB function is controlled using software control registers.
PS2 function is controlled by the SELPS2 bit in USC register.
Rev. 1.80
7
March 11, 2016