HT46R46E_07 Datasheet, PDF (3/73 Pages) Holtek Semiconductor Inc – Cost-Effective A/D Type 8-Bit MCU

HT46R46E/C46E/R47E/C47E/R48AE/C48AE/R49E
Pin Assignment
P A 3 /P F D 1
PA2 2
PA1 3
PA0 4
S C L /P B 3 /A N 3 5
P B 2 /A N 2 6
P B 1 /A N 1 7
P B 0 /A N 0 8
VSS 9
1 8 P A 4 /T M R
1 7 P A 5 /IN T
16 P A 6
15 P A 7
14 O S C 2
13 O S C 1
12 V D D
11 R E S
1 0 S D A /P D 0 /P W M
H T 4 6 R 4 6 E /H T 4 6 C 4 6 E
H T 4 6 R 4 7 E /H T 4 6 C 4 7 E
1 8 D IP -A /S O P -A
PB5 1
PB4 2
P A 3 /P F D 3
PA2 4
PA1 5
PA0 6
P B 3 /A N 3 7
P B 2 /A N 2 8
P B 1 /A N 1 9
P B 0 /A N 0 1 0
V S S 11
P C 0 /S D A 1 2
24 P B 6
23 P B 7
2 2 P A 4 /T M R
2 1 P A 5 /IN T
20 P A 6
19 P A 7
18 O S C 2
17 O S C 1
16 V D D
15 R E S
1 4 P D 0 /P W M
1 3 P C 1 /S C L
H T 4 6 R 4 8 A E /H T 4 6 C 4 8 A E
2 4 S K D IP -A /S O P -A
PB5 1
PB4 2
P A 3 /P F D 3
PA2 4
PA1 5
PA0 6
P B 3 /A N 3 7
P B 2 /A N 2 8
P B 1 /A N 1 9
P B 0 /A N 0 1 0
V S S 11
P C 0 /S D A 1 2
PB5 1
PB4 2
24 P B 6
P A 3 /P F D 3
23 P B 7
PA2 4
2 2 P A 4 /T M R
PA1 5
2 1 P A 5 /IN T
PA0 6
20 P A 6
P B 3 /A N 3 7
19 P A 7
P B 2 /A N 2 8
18 O S C 2
P B 1 /A N 1 9
17 O S C 1
P B 0 /A N 0 1 0
16 V D D
15 R E S
V S S 11
P C 0 /S D A 1 2
1 4 P D 0 /P W M 0 ^{P C 1 /S C L 1 3}
1 3 P C 1 /S C L
P C 2 14
28 P B 6
27 P B 7
2 6 P A 4 /T M R
2 5 P A 5 /IN T
24 P A 6
23 P A 7
22 O S C 2
21 O S C 1
20 V D D
19 R E S
1 8 P D 1 /P W M 1
1 7 P D 0 /P W M 0
16 P C 4
15 P C 3
H T46R 49E
2 4 S K D IP -A /S O P -A
H T46R 49E
2 8 S K D IP -A /S O P -A
Pin Description
HT46R46E, HT46R47E
Pad Name I/O Options
Description
PA0~PA2
PA3/PFD
PA4/TMR
PA5/INT
PA6~PA7
Bidirectional 8-bit input/output port. Each individual pin on this port can be
Pull-high configured as a wake-up input by a configuration option. Software instruc-
I/O Wake-up tions determine if the pin is a CMOS output or Schmitt Trigger input. Configu-
PA3 or PFD ration options determine which pins on the port have pull-high resistors. Pins
PA3, PA4 and PA5 are pin-shared with PFD, TMR and INT, respectively.
PB0/AN0
PB1/AN1
PB2/AN2
I/O
SCL/PB3/AN3
Pull-high
Bidirectional 4-bit input/output port. Software instructions determine if the pin
is a CMOS output or Schmitt Trigger input. Configuration options determine
which pins on the port have pull-high resistors. PB is pin-shared with the A/D
input pins. The A/D inputs are selected via software instructions. Once se-
lected as an A/D input, the I/O function and pull-high resistor options are dis-
abled automatically. The SCL pin of the EEPROM is internally connected to
the PB3/AN3 pin.
SDA/PD0/PWM I/O
Pull-high
PD0 or PWM
Bidirectional 1-bit input/output port. Software instructions determine if the pin
is a CMOS output or Schmitt Trigger input. Configuration option determines if
this pin has a pull-high resistor. The PWM output is pin-shared with pin PD0
selected via a configuration option. The SDA pin of the EEPROM is internally
connected to the PD0/PWM pin.
OSC1
OSC2
OSC1, OSC2 are connected to an external RC network or external crystal,
I
O
Crystal or RC
determined by configuration option, for the internal system clock. If the RC
system clock option is selected, pin OSC2 can be used to measure the sys-
tem clock at 1/4 frequency.
RES
I
¾
Schmitt trigger reset input. Active low.
VDD
¾
¾
Positive power supply
VSS
¾
¾
Negative power supply, ground.
Note: 1. Each pin on PA can be programmed through a configuration option to have a wake-up function.
2. Individual pins can be selected to have a pull-high resistor.
Rev. 1.20
3
August 15, 2007