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HT46R46E_07 Datasheet, PDF (2/73 Pages) Holtek Semiconductor Inc – Cost-Effective A/D Type 8-Bit MCU
HT46R46E/C46E/R47E/C47E/R48AE/C48AE/R49E
Device Types
Devices which have the letter ²R² within their part number, indicate that they are OTP devices offering the advantages
of easy and effective program updates, using the Holtek range of development and programming tools. These devices
provide the designer with the means for fast and low-cost product development cycles. Devices which have the letter
²C² within their part number indicate that they are mask version devices. These devices offer a complementary device
for applications that are at a mature state in their design process and have high volume and low cost demands.
Fully pin and functionally compatible with their OTP sister devices, the mask version devices provide the ideal substi-
tute for products which have gone beyond their development cycle and are facing cost-down demands.
In this datasheet, for convenience, when describing device functions, only the OTP types are mentioned by name,
however the same described functions also apply to the Mask type devices.
Selection Table
Most features are common to all devices, the main feature distinguishing them are Program Memory capacity, I/O
count, A/D resolution, stack capacity and package types. The following table summarises the main features of each de-
vice.
Part No.
VDD
Program Data Memory
Memory SRAM EEPROM
I/O
Timer
Int.
A/D PWM Stack Package Types
HT46R46E
HT46C46E
2.2V~5.5V
1K´14
64´8
128´8
13 8-bit´1 3 8-bit´4 8-bit´1 4
18DIP/SOP
HT46R47E
HT46C47E
2.2V~5.5V
2K´14
64´8
128´8
13 8-bit´1 3 9-bit´4 8-bit´1 6
18DIP/SOP
HT46R48AE
HT46C48AE
2.2V~5.5V
2K´14
88´8
128´8
19 8-bit´1 3 9-bit´4 8-bit´1 6
24SKDIP/SOP
HT46R49E 2.2V~5.5V 4K´15 128´8 128´8 23 8-bit´1 3 9-bit´4 8-bit´2 6 24/28SKDIP/SOP
Note: Part numbers including ²C² are mask version devices, ²R² are OTP devices.
For devices that exist in two package formats, the table reflects the situation for the larger package.
Block Diagram
S y s te m R C /
X 'ta l O s c illa to r
T im in g
G e n e ra to r
In s tr u c tio n
D ecoder
In s tr u c tio n
R e g is te r
W DT
O s c illa to r
D a ta
M e m o ry
M
M UX
ACC
U
X
M e m o ry
P o in te r
A LU
S h ifte r
P ro g ra m
M e m o ry
P ro g ra m
C o u n te r
S ta c k
S ta c k P o in te r
L o o k -u p
T a b le
R e g is te r
L o o k -u p
T a b le
P o in te r
T o P ro g ra m
M e m o ry
C o n fig u r a tio n
O p tio n
EEPRO M
A /D
R eset&
D a ta M e m o ry C o n v e rte r
LV R
C o n fig .
R e g is te r
PW M
C o n fig . T im e r /
R e g is te r C o u n te r
PFD
C o n fig . In te r r u p t C o n fig . I/O
R e g is te r C ir c u it R e g is te r P o r ts
D e v ic e
P r o g r a m m in g
C ir c u itr y
Note: This block diagram represents the OTP devices, for the Mask devices there is no Device Programming
Circuitry.
Rev. 1.20
2
August 15, 2007