BS66FV340 Datasheet, PDF (137/265 Pages) Holtek Semiconductor Inc – Enhanced Touch Voice A/D Flash MCU

BS66FV340/BS66FV350/BS66FV360
Enhanced Touch Voice A/D Flash MCU
Periodic Type TM – PTM
The Periodic Type TM contains five operating modes, which are Compare Match Output, Timer/
Event Counter, Capture Input, Single Pulse Output and PWM Output modes. The Periodic TM can
also be controlled with two external input pins and can drive two external output pin.
Device
BS66FV340
BS66FV350
BS66FV360
PTM Core
10-bit PTM
(PTM0, PTM1)
PTM Input Pin
PTCK0, PTP0I
PTCK1, PTP1I
PTM Output Pin
PTP0, PTP0B
PTP1, PTP1B
CCRP
fSYS/4
fSYS
fH/1�
fH/�4
fSUB
fSUB
PTCKn
000
001
010
011
100
101 _PTnON
110 PTnPAU
111
PTnCK�~PTnCK0
10-�it Co�pa�ato� P ^{Co�pa�ato� P Mat�h}
�0~�9
10-�it Count-up Counte�
�0~�9
Counte� Clea� 0
1
PTnCCLR
10-�it Co�pa�ato� A
Co�pa�ato� A Mat�h
PTnIO1� PTnIO0
CCRA
Edge
Dete�to�
PTMnPF Inte��upt
PTnOC
Output
Cont�ol
Pola�ity
Cont�ol
Pin
Cont�ol
PTnM1� PTnM0 PTnPOL
PTnIO1� PTnIO0
PxSn
PTMnAF Inte��upt
PTnCAPTS
IFS
0
Pin
Cont�ol
1
PTPnI
PTPn
PTPnB
Periodic Type TM Block Diagram – n = 0 or 1
Periodic TM Operation
The size of Periodic TM is 16-bit wide and its core is a 10-bit count-up counter which is driven by
a user selectable internal or external clock source. There are also two internal comparators with the
names, Comparator A and Comparator P. These comparators will compare the value in the counter
with CCRP and CCRA registers. The CCRP and CCRA comparators are 10-bit wide whose value is
respectively compared with all counter bits.
The only way of changing the value of the 10-bit counter using the application program is to
clear the counter by changing the PTnON bit from low to high. The counter will also be cleared
automatically by a counter overflow or a compare match with one of its associated comparators.
When these conditions occur, a PTM interrupt signal will also usually be generated. The Periodic
Type TM can operate in a number of different operational modes, can be driven by different clock
sources including an input pin and can also control the output pins. All operating setup conditions
are selected using relevant internal registers.
Rev. 1.10
137
December 15, 2016