HT68F20_10 Datasheet, PDF (136/232 Pages) Holtek Semiconductor Inc – Enhanced I/O Flash Type MCU 8-Bit MCU with EEPROM

HT68F20/HT68F30/HT68F40/HT68F50/HT68F60
HT68FU30/HT68FU40/HT68FU50/HT68FU60
I²C Interface
The I²C interface is used to communicate with external
peripheral devices such as sensors, EEPROM memory
etc. Originally developed by Philips, it is a two line low
speed serial interface for synchronous serial data trans-
fer. The advantage of only two lines for communication,
relatively simple communication protocol and the ability
to accommodate multiple devices on the same bus has
made it an extremely popular interface type for many
applications.
VDD
SDA
SCL
D e v ic e
S la v e
D e v ic e
M a s te r
D e v ic e
S la v e
I²C Master Slave Bus Connection
· I²C Interface Operation
The I²C serial interface is a two line interface, a serial
data line, SDA, and serial clock line, SCL. As many
devices may be connected together on the same bus,
their outputs are both open drain types. For this rea-
son it is necessary that external pull-high resistors are
connected to these outputs. Note that no chip select
line exists, as each device on the I²C bus is identified
by a unique address which will be transmitted and re-
ceived on the I²C bus.
When two devices communicate with each other on
the bidirectional I²C bus, one is known as the master
device and one as the slave device. Both master and
slave can transmit and receive data, however, it is the
master device that has overall control of the bus. For
these devices, which only operates in slave mode,
there are two methods of transferring data on the I²C
bus, the slave transmit mode and the slave receive
mode.
There are several configuration options associated
with the I²C interface. One of these is to enable the
function which selects the SIM pins rather than normal
I/O pins. Note that if the configuration option does not
select the SIM function then the SIMEN bit in the
SIMC0 register will have no effect. A configuration op-
tion exists to allow a clock other than the system clock
to drive the I²C interface. Another configuration option
determines the debounce time of the I²C interface.
This uses the internal clock to in effect add a
debounce time to the external clock to reduce the pos-
sibility of glitches on the clock line causing erroneous
operation. The debounce time, if selected, can be
chosen to be either 1 or 2 system clocks.
S T A R T s ig n a l
fro m M a s te r
S e n d s la v e a d d r e s s
a n d R /W b it fr o m M a s te r
A c k n o w le d g e
fr o m s la v e
S e n d d a ta b y te
fro m M a s te r
A c k n o w le d g e
fr o m s la v e
S T O P s ig n a l
fro m M a s te r
· I²C Registers
There are three control registers associated with the
I²C bus, SIMC0, SIMC1 and SIMA and one data regis-
ter, SIMD. The SIMD register, which is shown in the
above SPI section, is used to store the data being
transmitted and received on the I²C bus. Before the
microcontroller writes data to the I²C bus, the actual
data to be transmitted must be placed in the SIMD
register. After the data is received from the I²C bus,
the microcontroller can read it from the SIMD register.
Any transmission or reception of data from the I²C bus
must be made via the SIMD register.
Note that the SIMA register also has the name SIMC2
which is used by the SPI function. Bit SIMEN and bits
SIM2~SIM0 in register SIMC0 are used by the I²C in-
terface.
Register
Name
SIMC0
SIMC1
SIMD
SIMA
7
SIM2
HCF
D7
IICA6
6
SIM1
HAAS
D6
IICA5
Bit
5
4
3
SIM0 PCKEN PCKP1
HBB
HTX
TXAK
D5
D4
D3
IICA4
IICA3
IICA2
I²C Registers List
2
PCKP0
SRW
D2
IICA1
1
SIMEN
IAMWU
D1
IICA0
0
¾
RXAK
D0
D0
Rev. 1.10
136
February 1, 2010