HT68F20_10 Datasheet, PDF (108/232 Pages) Holtek Semiconductor Inc – Enhanced I/O Flash Type MCU 8-Bit MCU with EEPROM

HT68F20/HT68F30/HT68F40/HT68F50/HT68F60
HT68FU30/HT68FU40/HT68FU50/HT68FU60
Enhanced Type TM Register Description
Overall operation of the Enhanced TM is controlled using a series of registers. A read only register pair exists to store
the internal counter 10-bit value, while two read/write register pairs exist to store the internal 10-bit CCRA and CCRB
value. The remaining three registers are control registers which setup the different operating and control modes as well
as the three CCRP bits.
Name
TM1C0
TM1C1
TM1C2
TM1DL
TM1DH
TM1AL
TM1AH
TM1BL
TM1BH
Bit7
T1PAU
T1AM1
T1BM1
D7
¾
D7
¾
D7
¾
Bit6
Bit5
Bit4
Bit3
Bit2
T1CK2 T1CK1 T1CK0
T1ON
T1RP2
T1AM0 T1AIO1 T1AIO0 T1AOC T1APOL
T1BM0 T1BIO1 T1BIO0 T1BOC T1BPOL
D6
D5
D4
D3
D2
¾
¾
¾
¾
¾
D6
D5
D4
D3
D2
¾
¾
¾
¾
¾
D6
D5
D4
D3
D2
¾
¾
¾
¾
¾
10-bit Enhanced TM Register List (if ETM is TM1)
Bit1
T1RP1
T1CDN
T1PWM1
D1
D9
D1
D9
D1
D9
Bit0
T1RP0
T1CCLR
T1PWM0
D0
D8
D0
D8
D0
D8
· 10-bit Enhanced TM Register List - HT68F30/HT68F40/HT68F50/HT68F60
¨ TM1C0 Register - 10-bit ETM
Bit
Name
R/W
POR
7
T1PAU
R/W
0
6
T1CK2
R/W
0
5
T1CK1
R/W
0
4
T1CK0
R/W
0
3
T1ON
R/W
0
2
T1RP2
R/W
0
1
T1RP1
R/W
0
0
T1RP0
R/W
0
Bit 7
Bit 6~4
Bit 3
T1PAU: TM1 Counter Pause Control
0: run
1: pause
The counter can be paused by setting this bit high. Clearing the bit to zero restores normal
counter operation. When in a Pause condition the TM will remain powered up and continue to
consume power. The counter will retain its residual value when this bit changes from low to high
and resume counting from this value when the bit changes to a low value again.
T1CK2~T1CK0: Select TM1 Counter clock
000: f_SYS/4
001: f_SYS
010: f_H/16
011: f_H/64
100: f_TBC
101: Reserved
110: TCK1 rising edge clock
111: TCK1 falling edge clock
These three bits are used to select the clock source for the TM. Selecting the Reserved clock
input will effectively disable the internal counter. The external pin clock source can be chosen to
be active on the rising or falling edge. The clock source f_SYS is the system clock, while f_H and
f_TBC are other internal clocks, the details of which can be found in the oscillator section.
T1ON: TM1 Counter On/Off Control
0: Off
1: On
This bit controls the overall on/off function of the TM. Setting the bit high enables the counter to
run, clearing the bit disables the TM. Clearing this bit to zero will stop the counter from counting
and turn off the TM which will reduce its power consumption. When the bit changes state from
low to high the internal counter value will be reset to zero, however when the bit changes from
high to low, the internal counter will retain its residual value until the bit returns high again.
Rev.1.10
108
February 1, 2010