BC68F0031 Datasheet, PDF (128/148 Pages) Holtek Semiconductor Inc – I/O RF Transparent Transmission Flash MCU

BC68F0031
I/O RF Transparent Transmission Flash MCU
Multi-function Interrupts
Within the device there are up to four Multi-function interrupts. Unlike the other independent
interrupts, these interrupts have no independent source, but rather are formed from other existing
interrupt sources, namely the TM Interrupts, UART Interrupt, I²C Interrupt, EEPROM Interrupt and
LVD Interrupt.
A Multi-function interrupt request will take place when any of the Multi-function interrupt request
flags, MFnF are set. The Multi-function interrupt flags will be set when any of their included
functions generate an interrupt request flag. To allow the program to branch to its respective interrupt
vector address, when the Multi-function interrupt is enabled and the stack is not full, and either one
of the interrupts contained within each of Multi-function interrupt occurs, a subroutine call to one of
the Multi-function interrupt vectors will take place. When the interrupt is serviced, the related Multi-
Function request flag will be automatically reset and the EMI bit will be automatically cleared to
disable other interrupts.
However, it must be noted that, although the Multi-function Interrupt flags will be automatically
reset when the interrupt is serviced, the request flags from the original source of the Multi-function
interrupts will not be automatically reset and must be manually reset by the application program.
TM Interrupts
The Standard and Compact Type TMs have two interrupts, one comes from the comparator A match
situation and the other comes from the comparator P match situation. All of the TM interrupts are
contained within the Multi-function Interrupts. For each of the Standard and Compact Type TMs
there are two interrupt request flags xTMPF and xTMAF and two enable bits xTMPE and xTMAE.
A TM interrupt request will take place when any of the TM request flags are set, a situation which
occurs when a TM comparator P or A match situation happens.
To allow the program to branch to its respective interrupt vector address, the global interrupt enable
bit, EMI, respective TM Interrupt enable bit, and relevant Multi-function Interrupt enable bit, MFnE,
must first be set. When the interrupt is enabled, the stack is not full and a TM comparator match
situation occurs, a subroutine call to the relevant Multi-function Interrupt vector locations, will take
place. When the TM interrupt is serviced, the EMI bit will be automatically cleared to disable other
interrupts, however only the related MFnF flag will be automatically cleared. As the TM interrupt
request flags will not be automatically cleared, they have to be cleared by the application program.
EEPROM Interrupt
The EEPROM interrupt is contained within the Multi-function Interrupt. An EEPROM Interrupt
request will take place when the EEPROM Interrupt request flag, DEF, is set, which occurs
when an EEPROM Write cycle ends. To allow the program to branch to its respective interrupt
vector address, the global interrupt enable bit, EMI, and EEPROM Interrupt enable bit, DEE, and
associated Multi-function interrupt enable bit, must first be set. When the interrupt is enabled, the
stack is not full and an EEPROM Write cycle ends, a subroutine call to the respective EEPROM
Interrupt vector will take place. When the EEPROM Interrupt is serviced, the EMI bit will be
automatically cleared to disable other interrupts, however only the Multi-function interrupt request
flag will be also automatically cleared. As the DEF flag will not be automatically cleared, it has to be
cleared by the application program.
Rev. 1.01
128
April 11, 2017