BC68F0031 Datasheet, PDF (103/148 Pages) Holtek Semiconductor Inc – I/O RF Transparent Transmission Flash MCU

BC68F0031
I/O RF Transparent Transmission Flash MCU
UART External Pins
To communicate with an external serial interface, the internal UART has two external pins known
as TX and RX. The TX and RX pins are the UART transmitter and receiver pins respectively. The
TX and RX pin function should first be selected by the corresponding pin-shared function selection
register before the UART function is used. Along with the UARTEN bit, the TXEN and RXEN bits,
if set, will setup these pins to their respective TX output and RX input conditions and disable any
pull-high resistor option which may exist on the TX and RX pins. When the TX or RX pin function
is disabled by clearing the UARTEN, TXEN or RXEN bit, the TX or RX pin will be set to a floating
state. At this time whether the internal pull-high resistor is connected to the TX or RX pin or not is
determined by the corresponding I/O pull-high function control bit.
UART Data Transfer Scheme
The above block diagram shows the overall data transfer structure arrangement for the UART. The
actual data to be transmitted from the MCU is first transferred to the TXR_RXR register by the
application program. The data will then be transferred to the Transmit Shift Register from where it
will be shifted out, LSB first, onto the TX pin at a rate controlled by the Baud Rate Generator. Only
the TXR_RXR register is mapped onto the MCU Data Memory, the Transmit Shift Register is not
mapped and is therefore inaccessible to the application program.
Data to be received by the UART is accepted on the external RX pin, from where it is shifted in,
LSB first, to the Receiver Shift Register at a rate controlled by the Baud Rate Generator. When the
shift register is full, the data will then be transferred from the shift register to the internal TXR_RXR
register, where it is buffered and can be manipulated by the application program. Only the TXR_
RXR register is mapped onto the MCU Data Memory, the Receiver Shift Register is not mapped and
is therefore inaccessible to the application program.
It should be noted that the actual register for data transmission and reception only exists as a single
shared register, TXR_RXR, in the Data Memory.
UART Status and Control Registers
There are five control registers associated with the UART function. The USR, UCR1 and UCR2
registers control the overall function of the UART, while the BRG register controls the Baud rate.
The actual data to be transmitted and received on the serial interface is managed through the TXR_
RXR data register.
Register
Name
7
USR
PERR
UCR1 UARTEN
UCR2
TXEN
TXR_RXR D7
BRG
D7
6
NF
BNO
RXEN
D6
D6
5
FERR
PREN
BRGH
D5
D5
Bit
4
3
OERR RIDLE
PRT STOPS
ADDEN WAKE
D4
D3
D4
D3
2
RXIF
TXBRK
RIE
D2
D2
1
TIDLE
RX8
TIIE
D1
D1
0
TXIF
TX8
TEIE
D0
D0
UART Registers List
Rev. 1.01
103
April 11, 2017