HT47C20L_05 Datasheet, PDF (10/45 Pages) Holtek Semiconductor Inc – R-F Type Low Voltage 8-Bit Mask MCU

HT47C20L
The function of data movement between two indirect ad-
dressing registers are not supported. The memory
pointer registers, MP0 and MP1, are both 8-bit registers
which can be used to access the data memory by com-
bining corresponding indirect addressing registers.
MP0 only can be applied to data memory, while MP1
can be applied to data memory and LCD display mem-
ory.
Accumulator
The accumulator is closely related to ALU operations. It
is also mapped to location 05H of the data memory and
is capable of carrying out immediate data operations.
The data movement between two data memory loca-
tions must pass through the accumulator.
Arithmetic and Logic Unit - ALU
This circuit performs 8-bit arithmetic and logic operation.
The ALU provides the following functions:
· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
· Logic operations (AND, OR, XOR, CPL)
· Rotation (RL, RR, RLC, RRC)
· Increment and Decrement (INC, DEC)
· Branch decision (SZ, SNZ, SIZ, SDZ ....)
The ALU not only saves the results of a data operation
but can change the status register.
Status Register - STATUS
This 8-bit register (0AH) contains the zero flag (Z), carry
flag (C), auxiliary carry flag (AC), overflow flag (OV), power
down flag (PDF) and watchdog time-out flag (TO). It also
records the status information and controls the operation
sequence.
With the exception of the TO and PDF flags, bits in
the status register can be altered by instructions like
most other registers. Any data written into the status
register will not change the TO or PDF flags. In addi-
tion it should be noted that operations related to the
status register may give different results from those
intended. The TO and PDF flags can only be
changed by the Watchdog Timer overflow, system
power-up, clearing the Watchdog Timer and execut-
ing the ²HALT² instruction.
The Z, OV, AC and C flags generally reflect the status of
the latest operations.
In addition, on entering the interrupt sequence or exe-
cuting the subroutine call, the status register will not be
automatically pushed onto the stack. If the contents of
status are important and if the subroutine can corrupt
the status register, precautions must be taken to save it
properly.
Interrupts
The HT47C20L provides an external interrupt, an inter-
nal timer/event counter interrupt, an internal time base
interrupt, and an internal real time clock interrupt. The
interrupt control register 0 (INTC0;0BH) and interrupt
control register 1 (INTC1;1EH) both contain the interrupt
control bits to set the enable/disable and interrupt re-
quest flags.
Once an interrupt subroutine is serviced, all other inter-
rupts will be blocked (by clearing the EMI bit). This
scheme may prevent any further interrupt nesting. Other
interrupt requests may happen during this interval, but
only the interrupt request flag is recorded. If a certain in-
terrupt needs servicing within the service routine, the
programmer may set the EMI bit and the corresponding
bit of INTC0 or INTC1 allow interrupt nesting. If the stack
is full, the interrupt request will not be acknowledged,
even if the related interrupt is enabled, until the SP is
decremented. If immediate service is desired, the stack
must be prevented from becoming full.
Bit No.
0
1
2
3
4
5
6
7
Label
C
AC
Z
OV
PDF
TO
¾
¾
Function
C is set if the operation results in a carry during an addition operation or if a borrow does not
take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate
through carry instruction.
AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from
the high nibble into the low nibble in subtraction; otherwise AC is cleared.
Z is set if the result of an arithmetic or logic operation is 0; otherwise Z is cleared.
OV is set if the operation results in a carry into the highest-order bit but not a carry out of the
highest-order bit, or vice versa; otherwise OV is cleared.
PDF is cleared when either a system power-up or executing the ²CLR WDT² instruction. PDF
is set by executing the ²HALT² instruction.
TO is cleared by a system power-up or executing the ²CLR WDT² or ²HALT² instruction. TO is
set by a WDT time-out.
Unused bit, read as ²0²
Unused bit, read as ²0²
STATUS (0AH) Register
Rev. 2.30
10
December 2, 2005