HD26LS32 Datasheet, PDF (9/15 Pages) Hitachi Semiconductor – Quadruple Differential Line Receivers With 3 State Outputs

HD26LS32
This circuit provides for the receiver input section to be pulled up or down by a high resistance that
prevents it from becoming a driver load so that the output goes high in the event of a transmission line
breakage or connector detachment.
When the input pin is placed in the open state by the pull-up/pull-down resistance, the differential input
voltage V_ID is as follows:
V_ID: (V_IA – V_IB) ≥ 0.2 V
and the output is fixed high.
However, if the receiver-side termination resistance remains connected despite a line breakage or connector
detachment, the output will be undetermined (figure 5).
1A
1Y
1B
2A
2Y
2B
3A
3Y
3B
4A
4Y
4B
Enable G
Enable G
Figure 1 HD26LS32 Block Diagram
5
4
Ta = 25°C
3
2
+3.25
mA
=
0
V
V ^CC _{= 5.25} ^V
1
V ^CC
0
–10 V –3 V
+3 V +10 V
–1
–2
–3
–3.25 mA
–4
–5
–25 –20 –15 –10 –5 0 5 10 15 20 25
Input Voltage Vin (V)
Figure 2 Input Voltage vs. Input Current Characteristics
9