HD26LS32 Datasheet, PDF (10/15 Pages) Hitachi Semiconductor – Quadruple Differential Line Receivers With 3 State Outputs

HD26LS32
5
V_CC = 5 V, Ta = 25°C
Input applied to pin A,
4
with pin B as reference
3
V_IC = –7 V
2
1
V_IC = 0 V
V_IC = +7 V
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
Differential Input Voltage V_ID (mV)
Figure 3 Differential Input Voltage vs. Output Voltage Characteristics
V_CC
A
R
Y
B
R
Figure 4 Fail-Safe Function
This is because, since the termination resistance is normally matched to the transmission line characteristic
impedance, the value falls to several tens of hundreds of ohms, and the differential input pins are shorted by
this termination resistance. That is, the differential input voltage V_ID comes within the range
V_ID: –0.2 V < V_IA – V_IB < 0.2 V
and the output becomes undetermined.
To prevent this, resistance R₁ is inserted in series with the transmission line as shown in figure 6,
minimizing the effect of the termination resistance. Resistance R₂ is added to increase the current flowing
between the termination resistance and R₁, enabling the value of R₁ to be kept small.
Inserting resistances R₁ and R₂ in this way provides for the differential input voltage V_ID to become 200 mV
or higher, but the following points must be noted.
• Smallest possible R₁ value
If this value is large, the receiver input sensitivity will fall.
• Largest possible R₂ value
If this value is small, the load on the driver will be large.
Figure 7 shows experimental differential input voltages for variations in R₁ and R₂.
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