HD74LV2G74A Datasheet, PDF (8/12 Pages) Hitachi Semiconductor – Single D-type Flip Flops with Preset and Clear

HD74LV2G74A
Switching Characteristics (cont)
• V_CC = 3.3 ± 0.3 V
Item
Symbol
Maximum clock f_max
frequency
Propagation t
PLH
delay time
t_PHL
Setup time t_su
Hold time
t_h
Pulse width t_w
T_a = 25°C
Min Typ
80 140
50 90
— 6.9
— 7.9
— 9.2
— 10.2
6.0 —
5.0 —
0.5 —
6.0 —
6.0 —
Max
—
—
12.3
11.9
15.8
15.4
—
—
—
—
—
T_a = –40 to 85°C
Min Max
70
—
45
—
1.0 14.5
1.0 14.0
1.0 18.0
1.0 17.5
7.0 —
5.0 —
0.5 —
7.0 —
7.0 —
Unit Test
FROM TO
Conditions (Input) (Output)
MHz C_L = 15 pF
C = 50 pF
L
ns C = 15 pF
L
PRE/CLR Q or Q
CLK
C_L = 50 pF PRE/CLR Q or Q
CLK
ns
D
PRE or CLR inactive
ns
ns
PRE or CLR “L”
CLK “H” or “L”
• V_CC = 5.0 ± 0.5 V
Item
Symbol
Maximum clock
f
max
frequency
Propagation t
PLH
delay time t
PHL
Setup time t_su
Hold time
t
h
Pulse width t
w
T = 25°C
a
Min Typ
130 180
90 140
— 5.0
— 5.6
— 6.6
— 7.2
5.0 —
3.0 —
0.5 —
5.0 —
5.0 —
Max
—
—
7.7
7.3
9.7
9.3
—
—
—
—
—
T_a = –40 to 85°C Unit Test
FROM TO
Min Max
Conditions (Input) (Output)
110 —
75
—
1.0 9.0
1.0 8.5
MHz C = 15 pF
L
C_L = 50 pF
ns C = 15 pF
L
PRE/CLR Q or Q
CLK
1.0 11.0
1.0 10.5
C_L = 50 pF PRE/CLR Q or Q
CLK
5.0 —
ns
D
3.0 —
PRE or CLR inactive
0.5 —
ns
5.0 —
ns
PRE or CLR “L”
5.0 —
CLK “H” or “L”
Rev.3, Jul. 2001, page 8 of 12