HD74LV2G74A Datasheet, PDF (7/12 Pages) Hitachi Semiconductor – Single D-type Flip Flops with Preset and Clear

HD74LV2G74A
Switching Characteristics
• V_CC = 1.8 ± 0.15 V
Item
Symbol
Maximum clock f_max
frequency
Propagation t
PLH
delay time
t_PHL
Setup time t_su
Hold time
t_h
Pulse width t_w
T_a = 25°C
Min Typ
30 60
20 40
— 16.3
— 17.9
— 21.6
— 24.5
13.0 —
9.0 —
0.5 —
12.0 —
12.0 —
Max
—
—
27.0
29.0
34.0
39.5
—
—
—
—
—
T_a = –40 to 85°C
Min Max
20
—
15
—
1.0 29.0
1.0 32.0
1.0 36.5
1.0 42.5
14.0 —
9.0 —
0.5 —
13.0 —
13.0 —
Unit Test
FROM TO
Conditions (Input) (Output)
MHz C_L = 15 pF
C = 50 pF
L
ns C = 15 pF
L
PRE/CLR Q or Q
CLK
C_L = 50 pF PRE/CLR Q or Q
CLK
ns
D
PRE or CLR inactive
ns
ns
PRE or CLR “L”
CLK “H” or “L”
• V_CC = 2.5 ± 0.2 V
Item
Symbol
Maximum clock
f
max
frequency
Propagation t
PLH
delay time t
PHL
Setup time t_su
Hold time
t
h
Pulse width t
w
T = 25°C
a
Min Typ
50 100
30 70
— 9.8
— 11.1
— 13.0
— 14.2
8.0 —
7.0 —
0.5 —
8.0 —
8.0 —
Max
—
—
14.8
16.4
17.4
20.0
—
—
—
—
—
T_a = –40 to 85°C
Min Max
40
—
25
—
1.0 17.0
1.0 19.0
1.0 20.0
1.0 23.0
9.0 —
7.0 —
0.5 —
9.0 —
9.0 —
Unit Test
FROM TO
Conditions (Input) (Output)
MHz C = 15 pF
L
C_L = 50 pF
ns C = 15 pF
L
PRE/CLR Q or Q
CLK
C_L = 50 pF PRE/CLR Q or Q
CLK
ns
D
PRE or CLR inactive
ns
ns
PRE or CLR “L”
CLK “H” or “L”
Rev.3, Jul. 2001, page 7 of 12