HD74LV1GT126A Datasheet, PDF (8/10 Pages) Hitachi Semiconductor – Bus Buffer Gate with 3-state Output

HD74LV1GT126A
• Waveforms – 1
tr
Input A
10 %
90 %
1.5 V
t_PLH
tf
90 %
1.5 V
10 %
t_PHL
Output Y
50%
50%
3V
GND
V_OH
V_OL
• Waveforms – 2
tr
Input OE
10 %
90 %
1.5 V
t_ZL
Waveform – A
50%
t_ZH
Waveform – B
50%
tf
90 %
1.5 V
10 %
t_LZ
t_HZ
V_OL + 0.3 V
V_OH – 0.3 V
3V
GND
V_CC
V_OL
V_OH
GND
Notes: 1. tr ≤ 3 ns, tf ≤ 3 ns
2. Input waveform : PRR ≤ 1 MHz, duty cycle 50%
3. Waveform – A is for an output with internal conditions such that the output is low
except when disabled by the output control.
4. Waveform – B is for an output with internal conditions such that the output is high
except when disabled by the output control.
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