HD74LV1GT126A Datasheet, PDF (1/10 Pages) Hitachi Semiconductor – Bus Buffer Gate with 3-state Output

HD74LV1GT126A
Bus Buffer Gate with 3–state Output
ADE-205-333B (Z)
3rd. Edition
April 2000
Description
The HD74LV1GT126A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled
when the associated output enable (OE) input is low. To ensure the high impedance state during power up
or power down, OE should be connected to V_CC through a pull-down resistor; the minimum value of the
resistor is determined by the current souring capability of the driver. Low voltage and high speed operation
is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
extends the battery life.
Features
• The basic gate function is lined up as hitachi uni logic series.
• Supplied on emboss taping for high speed automatic mounting.
• TTL compatible input level.
Supply voltage range : 4.5 to 5.5 V
Operating temperature range : –40 to +85°C
• All inputs V_IH (Max.) = 5.5 V (@V_CC = 0 V to 5.5 V)
All outputs V_O (Max.) = 5.5 V (@V_CC = 0 V)
• Output current ±12 mA (@V_CC = 4.5 V to 5.5 V)
• All the logical input has hysteresis voltage for the slow transition.