BB502C Datasheet, PDF (7/13 Pages) Hitachi Semiconductor – Build in Biasing Circuit MOS FET IC UHF/VHF RF Amplifier

Power Gain vs. Gate Resistance
30
25
20
15
10 ^VDS ^{= VG1 = 5 V}
V_G2S = 4 V
f = 900 MHz
5
0
100
200
500
1000
Gate Resistance R _G (k Ω )
BB502C
Noise Figure vs. Gate Resistance
4
V_DS = V_G1 = 5 V
V_G2S = 4 V
3 ^{f = 900 MHz}
2
1
0
100
200
500
1000
Gate Resistance R _G (k Ω )
Power Gain vs. Drain Current
30
25
20
15
10 ^VDS ^{= VG1 = 5 V}
V_G2S = 4 V
5
R_G = variable
f = 900 MHz
0
0
5
10
15
20
Drain Current I _D (mA)
Noise Figure vs. Drain Current
4
V_DS = V_G1 = 5 V
V_G2S = 4 V
3 ^{RG = variable}
f = 900 MHz
2
1
0
0
5
10
15
20
Drain Current I _D (mA)
7