HD404654 Datasheet, PDF (6/109 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404654 Series
Memory Map
ROM Memory Map
The ROM memory map is shown in figure 1 and described below.
0
15
16
63
64
2047
4095
Vector address
Zero-page subroutine
(64 words)
Program & pattern
(HD404652)
Program & pattern
(HD404654, HD4074654)
$0000
$000F
$0010
$003F
$0040
$07FF
$0FFF
0
JMPL instruction
$0000
1 ^{(Jump to RESET, STOPC routine)} $0001
2
JMPL instruction
$0002
3
(Jump to INT₀ routine)
$0003
4
JMPL instruction
$0004
5
(Jump to INT₁ routine)
$0005
6
JMPL instruction
$0006
7
(Jump to timer A routine)
$0007
8
Not used
9
$0008
$0009
10
JMPL instruction
$000A
11
(Jump to timer C, routine)
$000B
12
JMPL instruction
$000C
13
(Jump to timer D, routine)
$000D
14
JMPL instruction
$000E
15
(Jump to serial 1 routine)
$000F
Figure 1 ROM Memory Map
Vector Address Area ($0000–$000F): Reserved for JMPL instructions that branch to the start addresses
of the reset and interrupt routines. After MCU reset or an interrupt, program execution continues from the
vector address.
Zero-Page Subroutine Area ($0000–$003F): Reserved for subroutines. The program branches to a
subroutine in this area in response to the CAL instruction.
Pattern Area ($0000–$0FFF): Contains ROM data that can be referenced with the P instruction.
Program Area ($0000–$07FF (HD404652), $0000–$0FFF (HD404654, HD4074654)): Used for
program coding.
RAM Memory Map
The MCU contains a 512-digit × 4-bit RAM area consisting of a memory register area, a data area, and a
stack area. In addition, an interrupt control bits area, special register area, and register flag area are mapped
onto the same RAM memory space as a RAM-mapped register area outside the above areas. The RAM
memory map is shown in figure 2 and described as follows.
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