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HA16114P Datasheet, PDF (6/38 Pages) Hitachi Semiconductor – Switching Regulator for Chopper Type DC/DC Converter
HA16114P/PJ/FP/FPJ, HA16120FP/FPJ
Guide to the Functional Description
The description covers the topics indicated below.
Oscillator
1. frequency
(fOSC) control and
synchronization
DC/DC output
2.
voltage setting
and error
amplifier usage
3.
Dead-band and
soft-start settings
Output stage and
4. power MOS FET
driving method
GND*1 1
SYNC 2
RT 3
CT 4
IN(−) 5
E/O 6
IN(+) 7
P.GND*1 8
16 Vref
15 ADJ
14 DB
13 ON/OFF
12 TM
11 CL(−)
10 VIN
9 OUT
(Top view)
Vref adjustment,
undervoltage
5. lockout, and
overcurrent
protection
6. ON/OFF pin
usage
Intermittent
7.
mode timing
during
overcurrent
8.
Setting of
current limit
Note: 1. P.GND is a high-current (±1 A maximum peak) ground pin connected to the totem-pole output circuit.
GND is a low-current ground pin connected to the Vref voltage reference. Both pins must be grounded.
1. Sawtooth Oscillator (Triangle Wave)
1.1 Operation and Frequency Control
The sawtooth wave is a voltage waveform from which the PWM pulses are created (See figure 1). The
sawtooth oscillator operates as follows. A constant current IO determined by an external timing resistor RT
is fed continuously to an external timing capacitor CT. When the CT pin voltage exceeds a comparator
threshold voltage VTH, the comparator output opens a switching transistor, allowing a 3IO discharge current
to flow from CT. When the CT pin voltage drops below a threshold voltage VTL, the comparator output
closes the switching transistor, stopping the 3IO discharge. Repetition of these operations generates a
sawtooth wave.
The value of IO is 1.1 V/RT Ω. The IO current mirror has a limited current capacity, so RT should be at least
5 kΩ (IO ≤ 220 µA).
Internal resistances RA, RB, and RC set the peak and valley voltages VTH and VTL of the sawtooth waveform
at approximately 1.6 V and 1.0 V.
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