HA16114P Datasheet, PDF (10/38 Pages) Hitachi Semiconductor – Switching Regulator for Chopper Type DC/DC Converter

HA16114P/PJ/FP/FPJ, HA16120FP/FPJ
2.2 Error Amplifier Usage
Figure 2.3 shows an equivalent circuit of the error amplifier. The error amplifier in these ICs is a simple
NPN-transistor differential amplifier with a constant-current-driven output circuit.
The amplifier combines a wide bandwidth (f_T = 4 MHz) with a low open-loop gain (50 dB Typ), allowing
stable feedback to be applied when the power supply is designed. Phase compensation is also easy.
IC internal V_IN
IN(−)
IN(+)
80 µA
40 µA
E/O
To internal PWM
comparator
Figure 2.3 Error Amplifier Equivalent Circuit
3. Dead-Band Duty Cycle and Soft-Start Settings
3.1 Dead-Band Duty Cycle Setting
The dead-band duty cycle (the maximum duty cycle of the PWM pulse output) can be programmed by the
voltage V_DB at the DB pin. A convenient way to obtain V_DB is to divide the IC’s Vref output by two
external resistors. The dead-band duty cycle (DB) and V_DB can be calculated as follows.
DB =
V_TH − V_DB
V_TH − V_TL
× 100 (%) ⋅ ⋅ ⋅ ⋅ This applies when V_DB > V_TL.
If V_DB < V_TL, there is no PWM output.
V_DB = Vref ×
R₂
R₁ + R₂
Note: V_DB is the voltage at the DB pin.
V_TH: 1.6 V (Typ)
V_TL: 1.0 V (Typ)
Vref is typically 2.5 V. Select R₁ and R₂ so that 1.0 V ≤ V_DB ≤ 1.6 V.
Sawtooth
To Vref wave
−
R₁
DB
E/O
+
PWM
COMP
V_DB
+
R₂
from
UVL
Sawtooth wave
Voltage at DB pin
V_TH
V_DB
V_TL
Dead band
Note: V_TH and V_TL vary depending on the oscillator.
Select constants by testing under implementation
conditions.
Figure 3.1 Dead-Band Duty Cycle Setting
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