2SJ186 Datasheet, PDF (5/9 Pages) Hitachi Semiconductor – Silicon P-Channel MOS FET

Drain to Source Saturation Voltage
vs. Gate to Source Voltage
–20
Pulse Test
–16
–12
–1 A
–8
–0.5 A
–4
I_D = –0.2 A
0
–4 –8 –12 –16 –20
Gate to Source Voltage V_GS (V)
Static Drain to Source on State
Resistance vs. Case Temperature
24
Pulse Test
V_GS = –10 V
20
–1 A
–0.5 A
16
12
I_D = –0.2 A
8
4
–40 0
40
80 120 160
Case Temperature T_C (°C)
2SJ186
Static Drain to Source on State
Resistance vs. Drain Current
100
Pulse Test
50
20
10
V_GS = –10 V
–15 V
5
2
1
–0.01–0.02 –0.05 –0.1 –0.2 –0.5 –1
Drain Current I_D (A)
Forward Transfer Admittance
vs. Drain Current
1.0
Pulse Test
0.5 V_DS = –20 V ^TC ^{= –25°C}
0.2
25°C
75°C
0.1
0.05
0.02
0.01
–0.01–0.02 –0.05 –0.1 –0.2 –0.5 –0.1
Drain Current I_D (A)
5