2SK1625 Datasheet, PDF (4/6 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

2SK1625(L), 2SK1625(S)
Power vs. Temperature Derating
120
80
40
0
50
100
150
Case Temperature T_C (°C)
Maximum Safe Operation Area
50
30
10
3
1
0.3
DC
PW
Opera=ti1o0n
1
ms
(T
C
100
10
µ_s
ms
(=1 _{2S5h°oCt))}
µ_s
Ta = 25°C
0.1
0.05
1
3 10 30 100 300 1,000
Drain to Source Voltage V_DS (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
D=1
1.0
0.5
T_C = 25°C
0.3 _0.2
0.1
0.1 _0.05
0.02
0.03 _{01.0S1hot Pulse}
0.01
10 µ
100 µ
θch–c (t) = γ_S (t) · θch–c
θch–c = 1.67°C/W, T_C = 25°C
P_DM
PW
T
D
=
PW
T
1m
10 m
100 m
1
10
Pulse Width PW (s)
4