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HD74HCT137 Datasheet, PDF (2/8 Pages) Hitachi Semiconductor – 3-to-8-line Decoder/Demultiplexer with Address Latch
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HD74HCT137
Function Table
Inputs
Enable
Select
Outputs
GL G1
G2
C
B
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
XX
H
X
X
X
H
H
H
H
H
H
H
H
XL
X
X
X
X
H
H
H
H
H
H
H
H
LH
L
L
L
L
L
H
H
H
H
H
H
H
LH
L
L
L
H
H
L
H
H
H
H
H
H
LH
L
L
H
L
H
H
L
H
H
H
H
H
LH
L
L
H
H
H
H
H
L
H
H
H
H
LH
L
H
L
L
H
H
H
H
L
H
H
H
LH
L
H
L
H
H
H
H
H
H
L
H
H
LH
L
H
H
L
H
H
H
H
H
H
L
H
LH
L
H
H
H
H
H
H
H
H
H
H
L
HH
L
X
X
X
Output Corresponding to stored address L; all others H
Pin Arrangement
A1
B2
C3
GL 4
G2 5
G1 6
Y7 7
GND 8
B
A Y0
C
Y1
GL
Y2
G2
Y3
G1
Y4
Y7 Y6 Y5
(Top view)
16 VCC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
2
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