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HD74AC283 Datasheet, PDF (2/12 Pages) Hitachi Semiconductor – 4-bit Binary Full Adder with Fast Carry
HD74AC283/HD74ACT283
Logic Symbol
A0 B0 A1 B1 A2 B2 A3 B3
C0
C4
S0
S1
S2
S3
Pin Names
A0 – A3
B0 – B3
C0
S0 – S3
C4
A Operand Inputs
B Operand Inputs
Carry Input
Sum Outputs
Carry Output
Functional Description
The HD74AC283/HD74ACT283 adds two 4-bit binary words (A plus B) plus the incoming Carry (C0).
The binary sum appears on the Sum (S0 – S3) and outgoing carry (C4) outputs. The binary weight of the
various inputs and outputs is indicated by the subscript numbers, representing powers of two.
20 (A0 + B0 + C0) + 21 (A1 + B1) + 22 (A2 + B2) + 23 (A3 + B3) = S0 + 2S1 + 4S2 + 8S3 + 16C4
Where (+) = plus
Interchanging inputs of equal weight does not affect the operation. Thus C0, A0, B0 can be arbitrarily
assigned to pins 5, 6 and 7 for DIPS. Due to the symmetry of the binary add function, the
HD74AC283/HD74ACT283 can be used either with all inputs and outputs active High (positive logic) or
with all inputs and outputs active Low (negative logic). See Figure a. Note that if C0 is not used it must be
tied Low for active High logic or tied High for active Low logic.
Due to pin limitations, the intermediate carries of the HD74AC283/HD74ACT283 are not brought out for
use as inputs or outputs. However, other means can be used to effectively insert a carry into, or bring a
carry out from, an intermediate stage. Figure b shows how to make a 3-bit adder. Tying the operand inputs
of the fourth adder (A3, B3) Low makes S3 dependent only on, and equal to, the carry from the third adder.
Using somewhat the same principle Figure c shows a way of dividing the HD74AC283/HD74ACT283 into
a 2-bit and a 1-bit adder. The third stage adder (A2, B2, S2) is used merely as a means of getting a carry
(C10) signal into the fourth stage (via A2 and B2) and bringing out the carry from the second stage on S2.
Note that as long as A 2 and B2 are the same, whether High or Low, they do not influence S2. Similarly,
when A2 and B2 are the same the carry into the third stage does not influence the carry out of the third
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