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HD66206 Datasheet, PDF (18/21 Pages) Hitachi Semiconductor – 80-Channel Column/Common Driver for Middle- or Large-sized Liquid Crystal Panel
HD66206
AC Characteristics 2 (In Column Driver Operation) (VCC = 2.7 to 4.5V, GND = 0V, VCC – VEE = 6 to
28V, and Ta = –20 to +75 ° C, unless otherwise stated)
Item
Symbol Applicable pins
Min.
Max.
Clock cycle time
tCYC
CL2
152
—
Clock high level width
tCWH
CL2 and CL1
65
—
Clock low level width
tCWL
CL2
65
—
Clock setup time
tSCL
CL1 and CL2
80
—
Clock hold time
tHCL
CL1 and CL2
120
—
Clock rise time
tr
CL1 and CL2
—
1
Clock fall time
tf
CL1 and CL2
—
1
Data setup time
tDS
D0L, D1R, D2, D3, and CL2 50
—
Data hold time
tDH
D0L, D1R, D2, D3, and CL2 50
—
Enable setup time
tESU
( and CL2
30
—
Carry output delay time tCAR
&$5 and CL2
—
100
M phase difference
tCM
M and CL1
—
300
CL1 cycle time
tCL1
CL1
tCYC × 50 —
Notes: 1. Clock rise time (tr) and clock fall time (tf) must satisfy the following conditions:
tr and tf < (tCYC – tCWH – tCWL)/2
tr and tf ≤ 50
2. Defined by connecting the load circuit shown in Figure 14.
Unit Note
ns
ns
ns
ns
ns
ns 1
ns 1
ns
ns
ns
ns 2
ns
ns
Test point
30 pF
Figure 14 Load Circuit
163