HD404339 Datasheet, PDF (18/78 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer with large-capacity memory

HD404339 Series
Instruction cycles
1
2
3
4
5
6
Instruction
execution*
Interrupt
acceptance
Stacking
IE reset
Vector address
generation
Execution of JMPL
instruction at vector address
Execution of
instruction at
start address
of interrupt
routine
Note: * The stack is accessed and the interrupt enable flag is reset after the instruction
is executed, even if it is a two-cycle instruction.
Figure 10 Interrupt Processing Sequence
18