HD26LS32A Datasheet, PDF (1/5 Pages) Hitachi Semiconductor – Quadruple Differential Line Receivers With 3 State Outputs

HD26LS32A
Quadruple Differential Line Receivers With 3 State Outputs
The HD26LS32A features quadruple line receivers
designed to meet the specs of EIA standard RS-
422A and RS-423. This device operates from a
single 5 V power supply. The enable function is
common to all four receivers and offers a choice
of active high or active low input. Fail safe design
ensures that if the inputs are open, the outputs will
always be high.
Logic Diagram
1A
1Y
1B
2A
2Y
2B
3A
3Y
3B
4A
4Y
4B
Enable G
Enable G
Pin Arrangement
1B 1
1A 2
1Y 3
Enable ₄
G
2Y 5
2A 6
2B 7
GND 8
16 VCC
15 4B
14 4A
13 4Y
12 ^Enable
G
11 3Y
10 3A
9 3B
(Top View)
Function Table
Differential Input
A–B
VID ≥ VTH
VTL < VID < VTH
VID ≤ VTL
X
Enable
G
G
H
X
X
L
H
X
X
L
H
X
X
L
L
H
H : High level
L : Low level
X : Immaterial
? : Irrelevant
Z : High impedance
Output
Y
H
H
?
?
L
L
Z