CD22402 Datasheet, PDF (5/11 Pages) Harris Corporation – Sync Generator for TV Applications and Video Processing Systems

CD22402
Switching Electrical Specifications T_A = 25^oC and C_L = 15pF. Typical Temperature Coefficient for All Values of V_DD = 0.3%/^oC
TEST
CONDITIONS
PARAMETER (NOTE 4)
Output State Propagation Delay Time (50% to 50%)
SYMBOL
V_DD (V)
MIN
TYP MAX UNITS
Low-to-High Level
High-to-Low Level
Output State Transition Time (10% to 90%)
t_PLH
t_PHL
5
-
40
80
ns
10
-
20
40
ns
Low-to-High
t_TLH
5
-
High-to-Low
t_THL
10
-
Input Capacitance (Per Input)
C_I
-
-
NOTE:
4. The characteristics given are defined for unbuffered gate in the CMOS process of the CD22402.
45
90
ns
30
60
ns
5
-
pF
Logic Diagram
VERTICAL DRIVE (VERT. RESET
TO FIRST VERT. PULSE)
INTEGRATOR
10
+
RQ
SQ
51pF
22
10K
10K ₂₄
6
GENLOCK OSC.
GENLOCK
SYNC
20
HOR.
DR
SQ
RQ
1M
1N914
0.001µF
(NOTE 5)
21
1
(NOTE 6)
CRYSTAL
32 TIMES
HORIZ.
503.496kHz
100pF
23
1M
2
HOR. PROCESS
BLANKING
NOTES:
5. Pin 21 high when pin 20 is high (or open).
6. Pin 1 high inhibits clock.
FIGURE 1. DETAIL OF THE OSCILLATOR/GENLOCK PORTION OF THE CD22402
CLOCK TO
COUNTERS
8-44