HSD8M64B4W Datasheet, PDF (8/10 Pages) Hanbit Electronics Co.,Ltd – Synchronous DRAM Module 64Mbyte(8Mx64-Bit), 144pin SO-DIMM, 4Banks, 4K Ref., 3.3V

HANBit
HSD8M64B4W
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
PARAMETER
-13
-12
-10
-10L
SYMBOL
MIN MAX MIN MAX MIN MAX MIN MAX
UNIT
NOTE
CLK cycle time CAS
7.5
8
10
10
latency=3
t_CC
1000
1000
1000
1000 ns
1
CAS
-
-
10
12
latency=2
CLK to valid
CAS
5.4
6
6
6
output delay
latency=3
t_SAC
ns
1,2
CAS
-
-
6
7
latency=2
Output data
CAS
2.7
3
3
3
hold time
latency=3
t_OH
ns
2
CAS
-
-
3
3
latency=2
CLK high pulse width
t_CH
2.5
3
3
3
ns
3
CLK low pulse width
t_CL
2.5
3
3
3
ns
3
Input setup time
t_SS
1.5
2
2
2
ns
3
Input hold time
t_SH
0.8
1
1
1
ns
3
CLK to output in Low-Z
t_SLZ
1
1
1
1
ns
3
CLK to output CAS
5.4
6
6
6
ns
2
in Hi-Z
latency=3
t_SHZ
CAS
-
-
6
7
ns
latency=2
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, ie., [(tr + tf)/2-1]ns should be added to
the parameter.
URL:www.hbe.co.kr
REV.1.0 (August.2002)
8
HANBit Electronics Co.,Ltd.