HMN5128D Datasheet, PDF (8/9 Pages) Hanbit Electronics Co.,Ltd – Non-Volatile SRAM MODULE 4Mbit (512K x 8-Bit),32Pin-DIP, 5V

HANBit
HMN5128D
- WRITE CYCLE NO.2 (/CE-Controlled)^*1,2,3,4,5
tWC
Address
tAW
tAS
tCW
tWR2
/CE
tWP
/WE
tDW
tDH2
DIN
Data-in Valid
tWZ
DOUT
Data Undefined (2)
High-Z
NOTE:
1. /CE or /WE must be high during address transition.
2. Because I/O may be active (/OE low) during this period, data input signals of opposite
polarity to the outputs must not be applied.
3. If /OE is high, the I/O pins remain in a state of high impedance.
4. Either t_WR1 or t_WR2 must be met.
5. Either t_DH1 or t_DH2 must be met.
- POWER-DOWN/POWER-UP TIMING
VCC
4.75
VPFD
tPF
4.25
VSO
tFS
tWPT
tDR
/CE
VPFD
tPU
tCER
VSO
URL : www.hbe.co.kr
Rev. 0.0 (April, 2002)
8
HANBit Electronics Co.,Ltd