HDD16M64D8W Datasheet, PDF (4/10 Pages) Hanbit Electronics Co.,Ltd – DDR SDRAM Module 128Mbyte (16Mx64bit), based on16Mx8,4Banks, 4K Ref., DIMM,

HANBit
ABSOLUTE MAXIMUM RATINGS
HDD16M64D8W
PARAMETER
SYMBOL
RATING
Voltage on any pin relative to Vss
V_IN, V_OUT
-0.5 ~ 3.6
Voltage on V_DD supply relative to Vss
V_DD
-1.0 ~ 3.6
Voltage on V_DDQ supply relative to Vss
V_DDQ
-0.5 ~ 3.6
Storage temperature
T_STG
-55 ~ +150
Power dissipation
P_D
8.0
Short circuit current
I_OS
50
Notes: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
UNTE
V
V
V
°C
W
mA
POWER & DC OPERATING CONDITIONS
(Recommended operating conditions (Voltage referenced to Vss = 0V, T_A = 0 to 70°C) )
PARAMETER
SYMBOL
MIN
MAX
UNIT
NOTE
Supply Voltage
V_DD
2.3
2.7
V
I/O Supply Voltage
V_DDQ
2.3
2.7
V
I/O Reference Voltage
V_REF
VDDQ/2-50mV
VDDQ/2+50mV
V
1
I/O Termination Voltage(system)
V_TT
V_REF – 0.04
V_REF + 0.04
V
2
Input High Voltage
V_IH (DC)
V_REF + 0.15
V_REF + 0.3
V
4
Input Low Voltage
V_IL (DC)
-0.3
V_REF - 0.15
V
4
Input Voltage Level, CK and /CK inputs
V_IN (DC)
-0.3
V_DDQ + 0.3
V
Input Differential Voltage, CK and /CK inputs
V_ID (DC)
0.3
V_DDQ + 0.6
V
3
Input crossing point voltage, CK and CK inputs
V_Ix (DC)
1.15
1.35
V
5
Input leakage current
I _LI
-2
2
uA
Output leakage current
I _OZ
-5
5
uA
Output High current (V_OUT = 1.95V)
I _OH
-16.8
mA
Output Low current (V_OUT = 0.35V)
I _OL
16.8
mA
Output High Current(Half strengh driver)
I_OH
-9
mA
Output High Current(Half strengh driver)
I_OL
9
mA
Notes
1. Includes ± 25mV margin for DC offset on V_REF, and a combined total of ± 50mV margin for all AC noise and DC offset on V_REF,
bandwidth limited to 20MHz. The DRAM must accommodate DRAM current spikes on V_REF and internal DRAM noise coupled
TO V_REF, both of which may result in V_REF noise. V_REF should be de-coupled with an inductance of £ 3nH.
2. VTT is not applied directly to the device. V TT is a system supply for signal termination resistors, is expected to be set equal to
V_REF, and must track variations in the DC level of V_REF
3. VID is the magnitude of the difference between the input level on CK and the input level on CK.
4. These parameters should be tested at the pin on actual components and may be checked at either the pin or the pad in
simulation. The AC and DC input specifications are relative to a V_REF envelop that has been bandwidth limited to 200MHZ.
5. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the dc level of the same.
6. These charactericteristics obey the SSTL-2 class II standards.
URL : www.hbe.co.kr
REV 2.0 (November.2002)
4
HANBit Electronics Co.,Ltd.