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HSD64M64F8KA Datasheet, PDF (1/10 Pages) Hanbit Electronics Co.,Ltd – Synchronous DRAM Module 512Mbyte (64Mx64bit), SMM, based on 32Mx8 ,4Banks, 4K Ref., 3.3V
HANBit
HSD64M64F8KA
Synchronous DRAM Module 512Mbyte (64Mx64bit), SMM, based on
32Mx8 ,4Banks, 4K Ref., 3.3V
Part No. HSD64M64F8KA
GENERAL DESCRIPTION
The HSD64M64F8KA is a 64M x 64 bit Synchronous Dynamic RAM high-density memory module. The module consists
of sixteen CMOS 32M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil packages on a 120-pin glass-epoxy.
One 0.22uF and two 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM.
The HSD64M64F8KA is a SMM(Stackable Memory Module type) .Synchronous design allows precise cycle control with
the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies,
programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory
system applications All module components may be powered from a single 3.3V DC power supply and all inputs and
outputs are LVTTL-compatible.
FEATURES
PIN ASSIGNMENT
• Part Identification
HSD64M64F8KA – 10L : 100MHz (CL=3)
60-PIN P1 Connector
60-PIN P2 Connector
HSD64M64F8KA – 10 : 100MHz (CL=2)
PIN Symbol PIN Symbol PIN Symbol PIN Symbol
HSD64M64F8KA – 13 : 133MHz (CL=3)
1
Vcc
31
Vss
1
Vss
31
Vcc
• Burst mode operation
2 DQ32 32 DQ0
3 DQ33 33 DQ1
2
DQ16 32 DQ48
3
DQ17 33 DQ49
• Auto & self refresh capability (8192Cycles/64ms) 4
DQ34 34
DQ2
4
DQ18 34 DQ50
• LVTTL compatible inputs and outputs
• Single 3.3V ±0.3V power supply
• MRS cycle with address key programs
- Latency (Access from column address)
5 DQ35 35 DQ3
5
DQ19 35 DQ51
6 DQ36 36 DQ4
6
DQ20 36 DQ52
7 DQ37 37 DQ5
7
DQ21 37 DQ53
8 DQ38 38 DQ6
8
DQ22 38 DQ54
9 DQ39 39 DQ7
9
DQ23 39 DQ55
- Burst length (1, 2, 4, 8 & Full page)
- Data scramble (Sequential & Interleave)
10
Vcc
40
11 DQ40 41
12 DQ41 42
Vss
DQ8
DQ9
10
Vss
40
Vcc
11 DQ24 41 DQ56
12 DQ25 42 DQ57
• All inputs are sampled at the positive going
13 DQ42 43 DQ10 13 DQ26 43 DQ58
14 DQ43 44 DQ11 14 DQ27 44 DQ59
edge of the system clock
15 DQ44 45 DQ12 15 DQ28 45 DQ60
• The used device is stacked 8M x 8bit x 4Banks
16
17
DQ45
DQ46
46
47
DQ13
DQ14
16
17
DQ29
DQ30
46
47
DQ61
DQ62
SDRAM
18 DQ47 48 DQ15 18 DQ31 48 DQ63
19
Vcc
49
Vss
19
Vss
49
Vcc
20 DQM4 50 DQM0 20 DQM2 50 DQM6
21 DQM5 51 DQM1 21 DQM3 51 DQM7
22
NC
52
/WE
22
NC
52
A12
23 CKE0 53 CLK0 23
BA0
53
A11
24 CKE1 54 CLK1 24
BA1
54
A9
25
Vcc
55
Vss
25 A10/AP 55
A8
26
NC
56 /CAS 26
A0
56
A7
27
NC
57 /RAS 27
A1
57
A6
28 /CS1 58 /CS1 28
A2
58
A5
29 /CS2 59 /CS2 29
A3
59
A4
30
Vcc
60
Vss
30
Vss
60
Vcc
URL:www.hbe.co.kr
REV. 1.0 (August, 2002)
1
HANBit Electronics Co.,Ltd.