GS8160F18T Datasheet, PDF(9/22 Page) GSI Technology – 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

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GS8160F18T Datasheet, PDF (9/22 Pages) GSI Technology – 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

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GS8160F18/32/36T-5.5/6/6.5/7/7.5/8.5

Simplified State Diagram

Deselect

First Write R

First Read

X Burst Write

Burst Read

Notes:

1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.

2. The upper portion of the diagram assumes active use of only the Enable (E1, E2, and E3) and Write (BA, BB, BC, BD, BW, and GW) con-

trol inputs and that ADSP is tied high and ADSC is tied low.

3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs and

assumes ADSP is tied high and ADV is tied low.

Rev: 2.12 11/2004

9/22

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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