GS74116TP Datasheet, PDF (9/14 Pages) GSI Technology – 256K x 16 4Mb Asynchronous SRAM

Write Cycle 3: UB, LB control
Address
OE
CE
UB, LB
WE
Data In
Data Out
GS74116TP/J/U
tWC
tAW
tAS
tCW
tWR1
tBW
tWP
tDW tDH
Data valid
High impedance
Rev: 2.02 3/2000
9/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.
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