GS8320Z36AGT-200I Datasheet, PDF (8/24 Pages) GSI Technology – 36Mb Pipelined and Flow Through Synchronous NBT SRAMs

GS8320Z18/36AGT-400/375/333/250/200/150
Pipeline and Flow Through Read Write Control State Diagram
D
B
Deselect
R
W
D
W
New Read
R
B
R
W
Burst Read
B
D
Key
Input Command Code
ƒ _Transition
Current State (n)
Next State (n+1)
n
n+1
Clock (CK)
D
R New Write
W
B
W
R
Burst Write
B
D
Notes:
1. The Hold command (CKE Low) is not
shown because it prevents any state change.
2. W, R, B and D represent input command
codes ,as indicated in the Synchronous Truth Table.
n+2
n+3
Command
ƒ
ƒ
ƒ
ƒ
Current State
Next State
Current State and Next State Definition for Pipeline and Flow Through Read/Write Control State Diagram
Rev: 1.03 8/2013
8/23
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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