English
Language : 

GS8673EQ18BGK-625I Datasheet, PDF (5/31 Pages) GSI Technology – On-Chip ECC with virtually zero SER
GS8673EQ18/36BK-675/625/550/500
Pin Description (Continued)
Symbol
Description
MZT[1:0]
PZT[1:0]
MVQ
VDD
Input Termination Mode Select—Selects the termination mode used for all terminated inputs. Must be tied
High or Low.
MZT[1:0] = 00: disabled.
MZT[1:0] = 01: RT/2 Thevenin-equivalent (pull-up = RT, pull-down = RT).
MZT[1:0] = 10: RT Thevenin-equivalent (pull-up = 2*RT, pull-down = 2*RT).
MZT[1:0] = 11: reserved.
Input Termination Configuration Select—Selects which inputs are terminated. Must be tied High or Low.
PZT[1:0] = 00: Write Data only.
PZT[1:0] = 01: Write Data, Input Clocks.
PZT[1:0] = 10: Write Data, Address, Control.
PZT[1:0] = 11: Write Data, Address, Control, Input Clocks.
I/O Voltage Select—Indicates what voltage is supplied to the VDDQ pins. Must be tied High or Low.
MVQ = 0: Configure for 1.2V to 1.35V nominal VDDQ.
MVQ = 1: Configure for 1.5V nominal VDDQ.
Core Power Supply—1.35V nominal core supply voltage.
VDDQ
I/O Power Supply—1.2V to 1.5V nominal I/O supply voltage. Configurable via MVQ pin.
VREF
Input Reference Voltage—Input buffer reference voltage.
VSS
Ground
TCK
JTAG Clock
TMS
JTAG Mode Select—Weakly pulled High internally.
TDI
JTAG Data Input—Weakly pulled High internally.
TDO
JTAG Data Output
MCH
Must Connect High—May be tied to VDDQ directly or via a 1kΩ resistor.
MCL
Must Connect Low—May be tied to VSS directly or via a 1kΩ resistor.
NC
No Connect—There is no internal chip connection to these pins. They may be left unconnected, or tied High
or Low.
Not Used, Input—There is an internal chip connection to these input pins, but they are unused by the
NUI
device. They are pulled Low internally. They may be left unconnected or tied Low. They should not be tied
High.
NUO
Not Used, Output—There is an internal chip connection to these output pins, but they are unused by the
device. Unused output pins are tri-stated internally. They should be left unconnected.
Type
Input
Input
Input
—
—
—
—
Input
Input
Input
Output
Input
Input
—
Input
Output
Rev: 1.06 5/2012
5/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology