GS816272C Datasheet, PDF (5/31 Pages) GSI Technology – 256K x 72 18Mb Sync Burst SRAMs

GS816272C
Byte Write Truth Table
Function
GW
BW
BA
BB
BC
BD
BE
BF
BG
BH Notes
Read
H
H
X
X
X
X
X
X
X
X
1
Read
H
L
H
H
H
H
H
H
H
H
1
Write byte A
H
L
L
H
H
H
L
H
H
H
2, 3
Write byte B
H
L
H
L
H
H
H
L
H
H
2, 3
Write byte C
H
L
H
H
L
H
H
H
L
H
2, 3, 4
Write byte D
H
L
H
H
H
L
H
H
H
L
2, 3, 4
Write byte E
H
L
H
H
H
H
L
H
H
H
2, 3, 4
Write byte F
H
L
H
H
H
H
H
L
H
H
2, 3, 4
Write byte G
H
L
H
H
H
H
H
H
L
H
2, 3, 4
Write byte H
H
L
H
H
H
H
H
H
H
L
2, 3, 4
Write all bytes
H
L
L
L
L
L
L
L
L
L
2, 3, 4
Write all bytes
L
X
X
X
X
X
X
X
X
X
Notes:
1. All byte outputs are active in read cycles regardless of the state of Byte Write Enable inputs.
2. Byte Write Enable inputs BA, BB, BC, BD, BE, BF, BG, and/or BH may be used in any combination with BW to write single or multiple bytes.
3. All byte I/Os remain High-Z during all write operations regardless of the state of Byte Write Enable inputs.
4. Bytes “E”, “F”, “G” and “H” are only available on the x72 version.
Rev: 2.18 11/2005
5/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, GSI Technology