GS816018C Datasheet, PDF (5/22 Pages) GSI Technology – 1M x 18 and 512K x 36 18Mb Sync Burst SRAMs

A0–An
LBO
ADV
CK
ADSC
ADSP
GW
BW
BA
BB
BC
BD
Register
DQ
A0
A1
GS816018/36C Block Diagram
A0
D0
Q0 _A1
D1
Q1
Counter
Load
Register
DQ
Register
DQ
Register
DQ
Register
DQ
Preliminary
GS816018/36CT-333/300/250
A
Memory
Array
Q
D
36
36
4
Register
DQ
E1
E2
E3
FT
G
Power Down
ZZ
Control
Note: Only x36 version shown for simplicity.
Register
DQ
Register
DQ
1
DQx1–DQx9
Rev: 1.00 9/2004
5/22
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2004, GSI Technology