GS81302D07E-333 Datasheet, PDF (31/31 Pages) GSI Technology – JEDEC-standard pinout and package

GS81302D07/10/19/37E-450/400/350/333/300
SigmaQuad-II+ SRAM Revision History
File Name
81302D1937_r1
Format/Content
GS81302D1937_r1.01
Content
GS81302D1937_r1.01
81302D1937_r1.02
81302D1937_r1.03
81302D1937_r1.04
Description of changes
Creation of datasheet
• Revised Pinout
• Revised JTAG Port AC Test Condtions;
• Corrected Ordering Information Table
• Updated 165 BGA Package Drawing
• Revised AC Electrical Characteristics Table
• Added On-Die Termination feature
• (Rev1.01a: Corrected TM reference in page 1 banner)
• Rev1.01 n/a for Q
• Corrected QVLD typo in AC Char table
Added QVLD max numbers in AC Char table
(Rev1.02b: removed CQ reference from SAMPLE-Z section in
JTAG Tap Instruction Set Summary)
Added 450 MHz speed bin
Added Op Currents
Updated to MP status
(Rev1.04a: Editorial updates)
(Rev1.04b: Corrected erroneous information in Input and Output
Leakage Characteristics table)
Rev: 1.04b 8/2017
31/31
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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